Messages in this thread | | | Date | Fri, 20 May 2022 16:32:55 +0200 | Subject | Re: [PATCH 3/3] KVM: x86/pmu: Drop redundant-clumsy-asymmetric PERFCTR_CORE MSRs handling | From | Paolo Bonzini <> |
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On 5/9/22 12:22, Like Xu wrote: > In commit c51eb52b8f98 ("KVM: x86: Add support for AMD Core Perf Extension > in guest"), the entry "case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5 " is > introduced asymmetrically into kvm_get_msr_common(), ignoring the set part. > > The missing guest PERFCTR_CORE cpuid check from the above commit leads to > the commit c28fa560c5bb ("KVM: x86/vPMU: Forbid reading from MSR_F15H_PERF > MSRs when guest doesn't have X86_FEATURE_PERFCTR_CORE"), but it simply > duplicates the default entry at the end of the switch statement explicitly. > > Removing the PERFCTR_CORE MSRs entry in kvm_get_msr_common() thoroughly > would be more maintainable, as we did for the same group of MSRs in the > kvm_set_msr_common() at the very beginning when the feature was enabled.
The code and the commit message suggest that some guests are expecting a #GP, and complain if they don't get it.
Paolo
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