Messages in this thread Patch in this message | ![/](/images/icornerl.gif) | | From | David Wang <> | Subject | [PATCH v2] ARM: dts: aspeed: Adding Jabil Rubypass BMC | Date | Fri, 20 May 2022 19:51:48 +0800 |
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The initial introduction of the jabil server with AST2600 BMC SoC.
Signed-off-by: David Wang <David_Wang6097@jabil.com> --- arch/arm/boot/dts/Makefile | 3 +- .../boot/dts/aspeed-bmc-jabil-rubypass.dts | 479 ++++++++++++++++++ 2 files changed, 481 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/aspeed-bmc-jabil-rubypass.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7c16f8a2b738..9c395178fc89 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1566,4 +1566,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-tyan-s8036.dtb \ aspeed-bmc-vegman-n110.dtb \ aspeed-bmc-vegman-rx20.dtb \ - aspeed-bmc-vegman-sx20.dtb + aspeed-bmc-vegman-sx20.dtb \ + aspeed-bmc-jabil-rubypass.dtb diff --git a/arch/arm/boot/dts/aspeed-bmc-jabil-rubypass.dts b/arch/arm/boot/dts/aspeed-bmc-jabil-rubypass.dts new file mode 100644 index 000000000000..77418895705a --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-jabil-rubypass.dts @@ -0,0 +1,479 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> + +/ { + model = "Jabil rbp"; + compatible = "jabil,rbp", "aspeed,ast2600"; + + chosen { + bootargs = "console=ttyS4,115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gfx_memory: framebuffer { + size = <0x01000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + + vcc_sdhci0: regulator-vcc-sdhci0 { + compatible = "regulator-fixed"; + regulator-name = "SDHCI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + + vccq_sdhci0: regulator-vccq-sdhci0 { + compatible = "regulator-gpio"; + regulator-name = "SDHCI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1>, + <1800000 0>; + }; + + vcc_sdhci1: regulator-vcc-sdhci1 { + compatible = "regulator-fixed"; + regulator-name = "SDHCI1 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhci1: regulator-vccq-sdhci1 { + compatible = "regulator-gpio"; + regulator-name = "SDHCI1 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1>, + <1800000 0>; + }; + + leds { + compatible = "gpio-leds"; + + identify { + default-state = "off"; + gpios = <&gpio0 ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>; + }; + + status_amber { + default-state = "off"; + gpios = <&gpio0 ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>; + }; + + status_green { + default-state = "keep"; + gpios = <&gpio0 ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>; + }; + + status_susack { + default-state = "off"; + gpios = <&gpio0 ASPEED_GPIO(V, 6) GPIO_ACTIVE_LOW>; + }; + + fan1_fault{ + default-state = "off"; + gpios = <&gpio3_71 0 GPIO_ACTIVE_HIGH>; + }; + fan2_fault{ + default-state = "off"; + }; + fan3_fault{ + default-state = "off"; + gpios = <&gpio3_71 2 GPIO_ACTIVE_HIGH>; + }; + fan4_fault{ + default-state = "off"; + gpios = <&gpio3_71 3 GPIO_ACTIVE_HIGH>; + }; + fan5_fault{ + default-state = "off"; + gpios = <&gpio3_71 4 GPIO_ACTIVE_HIGH>; + }; + fan6_fault{ + default-state = "off"; + gpios = <&gpio3_71 5 GPIO_ACTIVE_HIGH>; + }; + + power_amber { + default-state = "off"; + gpios = <&gpio0 ASPEED_GPIO(Y, 0) GPIO_ACTIVE_LOW>; + }; + }; +}; + +&mdio0 { + status = "okay"; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&mdio1 { + status = "okay"; + + ethphy1: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&mdio2 { + status = "okay"; + + ethphy2: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&mdio3 { + status = "okay"; + + ethphy3: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&mac0 { + status = "okay"; + + phy-mode = "rgmii-rxid"; + phy-handle = <ðphy0>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1_default>; +}; + + +&mac1 { + status = "okay"; + + phy-mode = "rgmii-rxid"; + phy-handle = <ðphy1>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default>; +}; + +&mac2 { + status = "okay"; + + phy-mode = "rgmii"; + phy-handle = <ðphy2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii3_default>; +}; + +&mac3 { + status = "okay"; + + phy-mode = "rgmii"; + phy-handle = <ðphy3>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii4_default>; +}; + +&emmc_controller { + status = "okay"; +}; + +&emmc { + non-removable; + bus-width = <4>; + max-frequency = <100000000>; + clk-phase-mmc-hs200 = <9>, <225>; +}; + +&rtc { + status = "okay"; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; +#include "openbmc-flash-layout-128.dtsi" + }; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <100000000>; + }; +}; + +&uart1 { + status = "okay"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default + &pinctrl_nrts1_default + &pinctrl_ndtr1_default + &pinctrl_ndsr1_default + &pinctrl_ncts1_default + &pinctrl_ndcd1_default + &pinctrl_nri1_default>; +}; + +&uart2 { + status = "okay"; + pinctrl-0 = <&pinctrl_txd2_default + &pinctrl_rxd2_default + &pinctrl_nrts2_default + &pinctrl_ndtr2_default + &pinctrl_ndsr2_default + &pinctrl_ncts2_default + &pinctrl_ndcd2_default + &pinctrl_nri2_default>; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + + +&i2c0 { + status = "okay"; + + temp@2e { + compatible = "adi,adt7490"; + reg = <0x2e>; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + multi-master; + status = "okay"; + + gpio@70 { + compatible = "nxp,pca9538"; + reg = <0x70>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(O, 7) IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "presence-fan1-n", "presence-fan2-n", "presence-fan3-n", "presence-fan4-n", + "presence-fan5-n", "presence-fan6-n", "", ""; + }; + + gpio3_71:gpio@71 { + compatible = "nxp,pca9538"; + reg = <0x71>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "led-fan1-fault", "led-fan2-fault", "led-fan3-fault", "led-fan4-fault", + "led-fan5-fault", "led-fan6-fault", "", ""; + }; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&i2c14 { + status = "okay"; +}; + +&i2c15 { + status = "okay"; +}; + +&fsim0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; + +&sdc { + status = "okay"; +}; + +/* + * The signal voltage of sdhci0 and sdhci1 on AST2600-A2 EVB is able to be + * toggled by GPIO pins. + * In the reference design, GPIOV0 of AST2600-A2 EVB is connected to the + * power load switch that provides 3.3v to sdhci0 vdd, GPIOV1 is connected to + * a 1.8v and a 3.3v power load switch that provides signal voltage to + * sdhci0 bus. + * If GPIOV0 is active high, sdhci0 is enabled, otherwise, sdhci0 is disabled. + * If GPIOV1 is active high, 3.3v power load switch is enabled, sdhci0 signal + * voltage is 3.3v, otherwise, 1.8v power load switch will be enabled, + * sdhci0 signal voltage becomes 1.8v. + * AST2600-A2 EVB also supports toggling signal voltage for sdhci1. + * The design is the same as sdhci0, it uses GPIOV2 as power-gpio and GPIOV3 + * as power-switch-gpio. + */ +&sdhci0 { + status = "okay"; + bus-width = <4>; + max-frequency = <100000000>; + sdhci-drive-type = /bits/ 8 <3>; + sdhci-caps-mask = <0x7 0x0>; + sdhci,wp-inverted; + vmmc-supply = <&vcc_sdhci0>; + vqmmc-supply = <&vccq_sdhci0>; + clk-phase-sd-hs = <7>, <200>; +}; + +&sdhci1 { + status = "okay"; + bus-width = <4>; + max-frequency = <100000000>; + sdhci-drive-type = /bits/ 8 <3>; + sdhci-caps-mask = <0x7 0x0>; + sdhci,wp-inverted; + vmmc-supply = <&vcc_sdhci1>; + vqmmc-supply = <&vccq_sdhci1>; + clk-phase-sd-hs = <7>, <200>; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&gfx { + status = "okay"; + memory-region = <&gfx_memory>; +}; + +&gpio0 { + status = "okay"; + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "presence-ncsi-i210-n","","","","","","","led-identify-n", + /*C0-C7*/ "","","","","","","","", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","","","","","id-button","", + /*G0-G7*/ "","","led-status-green-n","led-status-amber-n","","","","", + /*H0-H7*/ "","","","","","cpu-caterr","","cpu1-caterr-n", + /*I0-I7*/ "","","","","","","","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "","","","","","","","", + /*O0-O7*/ "","","","","","","nmi-button","", + /*P0-P7*/ "reset-button","reset-out","power-button","power-out","","","","led-hartbeat-n", + /*Q0-Q7*/ "","","","","","","","", + /*R0-R7*/ "","","","","","","","", + /*S0-S7*/ "","","","","","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "regulator-vcc-sdhci0","regulator-vccq-sdhci0","regulator-vcc-sdhci1","regulator-vccq-sdhci1","sio-power-good","led-bmc-fw-config-done-n","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "cpu-err2","","","","","","","", + /*Y0-Y7*/ "led-power-amber","","","","","","","", + /*Z0-Z7*/ "cpu-err0","cpu-err1","","","","","",""; + }; + +&gpio1 { + status = "okay"; +}; + +&kcs3 { + aspeed,lpc-io-reg = <0xCA2>; + status = "okay"; +}; + +&kcs4 { + aspeed,lpc-io-reg = <0xCA4>; + status = "okay"; +}; + +&lpc_snoop { + snoop-ports = <0x80>; + status = "okay"; +}; + -- 2.30.2
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