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SubjectRe: [RESEND v4 1/2] dt-bindings: interconnect: Add MediaTek CCI dt-bindings
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On Fri, 2022-05-13 at 11:35 +0800, Chen-Yu Tsai wrote:
> On Fri, May 13, 2022 at 11:31 AM Johnson Wang <
> johnson.wang@mediatek.com> wrote:
> >
> > Add devicetree binding of MediaTek CCI on MT8183 and MT8186.
> >
> > Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
> > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
> > ---
> > .../bindings/interconnect/mediatek,cci.yaml | 140
> > ++++++++++++++++++
> > MAINTAINERS | 1 +
> > 2 files changed, 141 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
> > b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
> > new file mode 100644
> > index 000000000000..034c3b38ca3d
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
> > @@ -0,0 +1,140 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id:
> > https://urldefense.com/v3/__http://devicetree.org/schemas/interconnect/mediatek,cci.yaml*__;Iw!!CTRNKA9wMg0ARbw!0vYE2yw5meNp-VKz6-Xp4C_qT8rz0tpzc0iPAGI__dVczbtBVpOcQfxdrQADjIdqtgDrrni0ZKWuBFP1QcwD0mHhOw$
> >
> > +$schema:
> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!0vYE2yw5meNp-VKz6-Xp4C_qT8rz0tpzc0iPAGI__dVczbtBVpOcQfxdrQADjIdqtgDrrni0ZKWuBFP1QcxLQ8hn_A$
> >
> > +
> > +title: MediaTek Cache Coherent Interconnect (CCI) frequency and
> > voltage scaling
> > +
> > +maintainers:
> > + - Jia-Wei Chang <jia-wei.chang@mediatek.com>
> > + - Johnson Wang <johnson.wang@mediatek.com>
> > +
> > +description: |
> > + MediaTek Cache Coherent Interconnect (CCI) is a hardware engine
> > used by
> > + MT8183 and MT8186 SoCs to scale the frequency and adjust the
> > voltage in
> > + hardware. It can also optimize the voltage to reduce the power
> > consumption.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - mediatek,mt8183-cci
> > + - mediatek,mt8186-cci
> > +
> > + clocks:
> > + items:
> > + - description:
> > + The multiplexer for clock input of the bus.
> > + - description:
> > + A parent of "cpu" clock which is used as an intermediate
> > clock source
>
> Replace "cpu" with "bus"?
>
> > + when the original CPU is under transition and not stable
> > yet.
>
>
> And also, "when the original clock source (PLL) is under transition
> ..."
>
> Otherwise,
>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

Hi Chen-Yu,

I will modify them in the next version.

BRs,
Johnson Wang

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