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SubjectRe: [PATCH] x86/events/intel/ds: Enable large PEBS for PERF_SAMPLE_WEIGHT type
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On 5/19/2022 6:45 AM, Like Xu wrote:
> From: Like Xu <likexu@tencent.com>
>
> Large PEBS could be enabled for the generic PERF_SAMPLE_WEIGHT sample

I think all the information required by the PERF_SAMPLE_WEIGHT is
available in the pebs record. It should be OK to enable it for the large
PEBS.

Can you please use the PERF_SAMPLE_WEIGHT_TYPE instead? It includes the
new weight extension.

Thanks,
Kan

> type until other non-compatible flags such as PERF_SAMPLE_DATA_PAGE_SIZE
> (due to lack of munmap tracking) finally stop it.
>
> Add PERF_SAMPLE_WEIGHT to LARGE_PEBS_FLAGS to save PMIs overhead.
>
> Tested it with:
>
> $ perf mem record -c 1000 workload
> Before: Captured and wrote 0.126 MB perf.data (958 samples) [958 PMIs]
> After: Captured and wrote 0.313 MB perf.data (4859 samples) [3 PMIs]
>
> Cc: Kan Liang <kan.liang@linux.intel.com>
> Cc: Stephane Eranian <eranian@google.com>
> Cc: Jiri Olsa <jolsa@kernel.org>
> Reported-by: Yongchao Duan <yongduan@tencent.com>
> Signed-off-by: Like Xu <likexu@tencent.com>
> ---
> arch/x86/events/perf_event.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
> index 21a5482bcf84..1ed0970d67e6 100644
> --- a/arch/x86/events/perf_event.h
> +++ b/arch/x86/events/perf_event.h
> @@ -136,7 +136,8 @@ struct amd_nb {
> PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | \
> PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR | \
> PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER | \
> - PERF_SAMPLE_PERIOD | PERF_SAMPLE_CODE_PAGE_SIZE)
> + PERF_SAMPLE_PERIOD | PERF_SAMPLE_CODE_PAGE_SIZE | \
> + PERF_SAMPLE_WEIGHT)
>
> #define PEBS_GP_REGS \
> ((1ULL << PERF_REG_X86_AX) | \

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