Messages in this thread | | | Subject | Re: [PATCH v2 2/3] clk: ingenic: Mark critical clocks in Ingenic SoCs | From | Stephen Boyd <> | Date | Wed, 18 May 2022 13:57:52 -0700 |
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Quoting Aidan MacDonald (2022-04-28 09:44:53) > Consider CPU, L2 cache, and memory clocks as critical to prevent > them -- and the parent clocks -- from being automatically gated, > since nothing calls clk_get() on these clocks. > > Gating the CPU clock hangs the processor, and gating memory makes > external DRAM inaccessible. Normal kernel code can't hope to deal > with either situation so those clocks have to be critical. > > The L2 cache is required only if caches are running, and could be > gated if the kernel takes care to flush and disable caches before > gating the clock. There's no mechanism to do this, and probably no > reason to do it, so it's simpler to mark the L2 cache as critical. > > Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> > Reviewed-by: Paul Cercueil <paul@crapouillou.net> > ---
Applied to clk-next
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