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    Subject[PATCH 18/20] media: s5p-mfc: Correction in register read and write for H264
    Date
    Few of the H264 encoder registers written were not
    getting reflected since the read values was not
    stored and getting overwritten.

    Cc: linux-fsd@tesla.com
    Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
    ---
    .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 14 +++++++-------
    1 file changed, 7 insertions(+), 7 deletions(-)

    diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
    index 44058827eaa3..40e4cb5bf3ae 100644
    --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
    +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
    @@ -1268,7 +1268,7 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
    }

    /* aspect ratio VUI */
    - readl(mfc_regs->e_h264_options);
    + reg = readl(mfc_regs->e_h264_options);
    reg &= ~(0x1 << 5);
    reg |= ((p_h264->vui_sar & 0x1) << 5);
    writel(reg, mfc_regs->e_h264_options);
    @@ -1291,7 +1291,7 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)

    /* intra picture period for H.264 open GOP */
    /* control */
    - readl(mfc_regs->e_h264_options);
    + reg = readl(mfc_regs->e_h264_options);
    reg &= ~(0x1 << 4);
    reg |= ((p_h264->open_gop & 0x1) << 4);
    writel(reg, mfc_regs->e_h264_options);
    @@ -1305,23 +1305,23 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
    }

    /* 'WEIGHTED_BI_PREDICTION' for B is disable */
    - readl(mfc_regs->e_h264_options);
    + reg = readl(mfc_regs->e_h264_options);
    reg &= ~(0x3 << 9);
    writel(reg, mfc_regs->e_h264_options);

    /* 'CONSTRAINED_INTRA_PRED_ENABLE' is disable */
    - readl(mfc_regs->e_h264_options);
    + reg = readl(mfc_regs->e_h264_options);
    reg &= ~(0x1 << 14);
    writel(reg, mfc_regs->e_h264_options);

    /* ASO */
    - readl(mfc_regs->e_h264_options);
    + reg = readl(mfc_regs->e_h264_options);
    reg &= ~(0x1 << 6);
    reg |= ((p_h264->aso & 0x1) << 6);
    writel(reg, mfc_regs->e_h264_options);

    /* hier qp enable */
    - readl(mfc_regs->e_h264_options);
    + reg = readl(mfc_regs->e_h264_options);
    reg &= ~(0x1 << 8);
    reg |= ((p_h264->open_gop & 0x1) << 8);
    writel(reg, mfc_regs->e_h264_options);
    @@ -1342,7 +1342,7 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
    writel(reg, mfc_regs->e_h264_num_t_layer);

    /* frame packing SEI generation */
    - readl(mfc_regs->e_h264_options);
    + reg = readl(mfc_regs->e_h264_options);
    reg &= ~(0x1 << 25);
    reg |= ((p_h264->sei_frame_packing & 0x1) << 25);
    writel(reg, mfc_regs->e_h264_options);
    --
    2.17.1
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