Messages in this thread | | | From | Sami Tolvanen <> | Date | Mon, 16 May 2022 09:24:50 -0700 | Subject | Re: [RFC PATCH v2 10/21] arm64: Add CFI error handling |
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On Sat, May 14, 2022 at 2:51 PM Kees Cook <keescook@chromium.org> wrote: > > On Fri, May 13, 2022 at 01:21:48PM -0700, Sami Tolvanen wrote: > > With -fsanitize=kcfi, CFI always traps. Add arm64 support for handling > > CFI failures. The registers containing the target address and the > > expected type are encoded in the first ten bits of the ESR as follows: > > > > - 0-4: n, where the register Xn contains the target address > > - 5-9: m, where the register Wm contains the type hash > > > > Suggested-by: Mark Rutland <mark.rutland@arm.com> > > Signed-off-by: Sami Tolvanen <samitolvanen@google.com> > > It might be nice just to include an example exception Oops in this > commit log.
Agreed, I'll add an example.
Sami
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