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Subject[PATCH v5 3/3] ARM: dts: sun8i-r40: Add thermal trip points/cooling maps
Date
From: qianfan Zhao <qianfanguijin@163.com>

For the trip points, I used values from the BSP code.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (85°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index ae2a5ebd9924..b43f3f72a915 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -86,6 +86,7 @@ cpu0: cpu@0 {
reg = <0>;
clocks = <&ccu CLK_CPU>;
clock-names = "cpu";
+ #cooling-cells = <2>;
};

cpu1: cpu@1 {
@@ -94,6 +95,7 @@ cpu1: cpu@1 {
reg = <1>;
clocks = <&ccu CLK_CPU>;
clock-names = "cpu";
+ #cooling-cells = <2>;
};

cpu2: cpu@2 {
@@ -102,6 +104,7 @@ cpu2: cpu@2 {
reg = <2>;
clocks = <&ccu CLK_CPU>;
clock-names = "cpu";
+ #cooling-cells = <2>;
};

cpu3: cpu@3 {
@@ -110,6 +113,7 @@ cpu3: cpu@3 {
reg = <3>;
clocks = <&ccu CLK_CPU>;
clock-names = "cpu";
+ #cooling-cells = <2>;
};
};

@@ -125,6 +129,30 @@ cpu_thermal: cpu0-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+ trips {
+ cpu_hot_trip: cpu-hot {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_trip: cpu-very-hot {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpu-hot-limit {
+ trip = <&cpu_hot_trip>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};

gpu_thermal: gpu-thermal {
--
2.25.1
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