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SubjectRe: [PATCH v3 0/4] clk: Baikal-T1 DDR/PCIe resets and some xGMAC fixes
Hello Stephen, Michael

The series has been here for about two months with no comments. Seeing
the dependent patches won't be merged in before the next merge window,
could you please merge this series in through your repo?

-Sergey

On Tue, May 03, 2022 at 11:57:18PM +0300, Serge Semin wrote:
> This patchset is an initial one in the series created in the framework
> of my Baikal-T1 PCIe/eDMA-related work:
>
> [1: In-progress v3] clk: Baikal-T1 DDR/PCIe resets and some xGMAC fixes
> Link: https://lore.kernel.org/linux-pci/20220330144320.27039-1-Sergey.Semin@baikalelectronics.ru/
> [2: In-progress v1] PCI: dwc: Various fixes and cleanups
> Link: https://lore.kernel.org/linux-pci/20220324012524.16784-1-Sergey.Semin@baikalelectronics.ru/
> [3: In-progress v1] PCI: dwc: Add dma-ranges/YAML-schema/Baikal-T1 support
> Link: https://lore.kernel.org/linux-pci/20220324013734.18234-1-Sergey.Semin@baikalelectronics.ru/
> [4: In-progress v1] dmaengine: dw-edma: Add RP/EP local DMA controllers support
> Link: https://lore.kernel.org/linux-pci/20220324014836.19149-1-Sergey.Semin@baikalelectronics.ru/
>
> Since some of the patches in the later patchsets depend on the
> modifications introduced here, @Lorenzo could you please merge this series
> through your PCIe subsystem repo? After getting all the required ack'es of
> course.
>
> Short summary regarding this patchset. A few more modifications are
> introduced here to finally finish the Baikal-T1 CCU unit support up and
> prepare the code before adding the Baikal-T1 PCIe/xGMAC support. First of
> all it turned out I specified wrong DW xGMAC PTP reference clock divider
> in my initial patches. It must be 8, not 10. Secondly I was wrong to add a
> joint xGMAC Ref and PTP clock instead of having them separately defined.
> The SoC manual describes these clocks as separate fixed clock wrappers.
> Finally in order to close the SoC clock/reset support up we need to add
> the DDR and PCIe interfaces reset controls support. It's done in two
> steps. First I've moved the reset-controls-related code into a dedicated
> module. Then the DDR/PCIe reset-control functionality is added.
>
> Link: https://lore.kernel.org/linux-pci/20220324010905.15589-1-Sergey.Semin@baikalelectronics.ru/
> Changelog v2:
> - Resubmit the series with adding @Philipp to the list of the recipients.
>
> Link: https://lore.kernel.org/linux-pci/20220330144320.27039-1-Sergey.Semin@baikalelectronics.ru/
> Changelog v3:
> - Rebased from v5.17 onto v5.18-rc3.
> - No comments. Just resend the series.
>
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
> Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>
> Cc: Rob Herring <robh@kernel.org>
> Cc: "Krzysztof Wilczyński" <kw@linux.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> Cc: linux-clk@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Cc: linux-mips@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
>
> Serge Semin (4):
> clk: baikal-t1: Fix invalid xGMAC PTP clock divider
> clk: baikal-t1: Define shared xGMAC ref/ptp clocks parent
> clk: baikal-t1: Move reset-controls code into a dedicated module
> clk: baikal-t1: Add DDR/PCIe directly controlled resets support
>
> drivers/clk/baikal-t1/Kconfig | 12 +-
> drivers/clk/baikal-t1/Makefile | 1 +
> drivers/clk/baikal-t1/ccu-div.c | 1 +
> drivers/clk/baikal-t1/ccu-div.h | 6 +
> drivers/clk/baikal-t1/ccu-rst.c | 373 ++++++++++++++++++++++++++++
> drivers/clk/baikal-t1/ccu-rst.h | 64 +++++
> drivers/clk/baikal-t1/clk-ccu-div.c | 102 ++------
> include/dt-bindings/reset/bt1-ccu.h | 9 +
> 8 files changed, 482 insertions(+), 86 deletions(-)
> create mode 100644 drivers/clk/baikal-t1/ccu-rst.c
> create mode 100644 drivers/clk/baikal-t1/ccu-rst.h
>
> --
> 2.35.1
>

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