Messages in this thread Patch in this message | | | From | Chris Packham <> | Subject | [PATCH v3 2/2] dt-bindings: gpio: gpio-mvebu: document offset and marvell,pwm-offset | Date | Thu, 12 May 2022 21:41:25 +1200 |
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The offset and marvell,pwm-offset properties weren't in the old binding. Add them based on the existing usage when the marvell,armada-8k-gpio compatible is used.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> ---
Notes: Changes in v3: - Split off from 1:1 conversion patch
Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml index 2d95ef707f53..790a17af7c59 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml @@ -41,6 +41,10 @@ properties: - const: pwm minItems: 1 + offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the gpio registers (in bytes) + interrupts: description: | The list of interrupts that are used for all the pins managed by this @@ -64,6 +68,10 @@ properties: "#gpio-cells": const: 2 + marvell,pwm-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the pwm registers (in bytes) + "#pwm-cells": description: The first cell is the GPIO line number. The second cell is the period -- 2.36.0
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