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    Subject[PATCH v3 1/2] ARM: dts: sun8i-r40: add opp table for cpu
    Date
    From: qianfan Zhao <qianfanguijin@163.com>

    OPP table value is get from allwinner lichee linux-3.10 kernel driver

    Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
    ---
    Changes in v3:
    - remove "allwinner-r40" compatible from allowlist.
    - split dts in two part.

    arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++++++
    1 file changed, 47 insertions(+)

    diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
    index 291f4784e86c..90de119095fa 100644
    --- a/arch/arm/boot/dts/sun8i-r40.dtsi
    +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
    @@ -54,6 +54,41 @@ / {
    #size-cells = <1>;
    interrupt-parent = <&gic>;

    + cpu0_opp_table: opp_table0 {
    + compatible = "operating-points-v2";
    + opp-shared;
    +
    + opp-720000000 {
    + opp-hz = /bits/ 64 <720000000>;
    + opp-microvolt = <1000000 1000000 1300000>;
    + clock-latency-ns = <2000000>;
    + };
    +
    + opp-912000000 {
    + opp-hz = /bits/ 64 <912000000>;
    + opp-microvolt = <1100000 1100000 1300000>;
    + clock-latency-ns = <2000000>;
    + };
    +
    + opp-1008000000 {
    + opp-hz = /bits/ 64 <1008000000>;
    + opp-microvolt = <1160000 1160000 1300000>;
    + clock-latency-ns = <2000000>;
    + };
    +
    + opp-1104000000 {
    + opp-hz = /bits/ 64 <1104000000>;
    + opp-microvolt = <1240000 1240000 1300000>;
    + clock-latency-ns = <2000000>;
    + };
    +
    + opp-1200000000 {
    + opp-hz = /bits/ 64 <1200000000>;
    + opp-microvolt = <1300000 1300000 1300000>;
    + clock-latency-ns = <2000000>;
    + };
    + };
    +
    clocks {
    #address-cells = <1>;
    #size-cells = <1>;
    @@ -84,24 +119,36 @@ cpu0: cpu@0 {
    compatible = "arm,cortex-a7";
    device_type = "cpu";
    reg = <0>;
    + clocks = <&ccu CLK_CPU>;
    + clock-names = "cpu";
    + operating-points-v2 = <&cpu0_opp_table>;
    };

    cpu1: cpu@1 {
    compatible = "arm,cortex-a7";
    device_type = "cpu";
    reg = <1>;
    + clocks = <&ccu CLK_CPU>;
    + clock-names = "cpu";
    + operating-points-v2 = <&cpu0_opp_table>;
    };

    cpu2: cpu@2 {
    compatible = "arm,cortex-a7";
    device_type = "cpu";
    reg = <2>;
    + clocks = <&ccu CLK_CPU>;
    + clock-names = "cpu";
    + operating-points-v2 = <&cpu0_opp_table>;
    };

    cpu3: cpu@3 {
    compatible = "arm,cortex-a7";
    device_type = "cpu";
    reg = <3>;
    + clocks = <&ccu CLK_CPU>;
    + clock-names = "cpu";
    + operating-points-v2 = <&cpu0_opp_table>;
    };
    };

    --
    2.25.1
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