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    Subject[PATCH 4.14 78/78] PCI: aardvark: Fix reading MSI interrupt number
    Date
    From: Pali Rohár <pali@kernel.org>

    commit 805dfc18dd3d4dd97a987d4406593b5a225b1253 upstream.

    In advk_pcie_handle_msi() it is expected that when bit i in the W1C
    register PCIE_MSI_STATUS_REG is cleared, the PCIE_MSI_PAYLOAD_REG is
    updated to contain the MSI number corresponding to index i.

    Experiments show that this is not so, and instead PCIE_MSI_PAYLOAD_REG
    always contains the number of the last received MSI, overall.

    Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt
    number. Since Aardvark already forbids more than 32 interrupts and uses
    own allocated hwirq numbers, the msi_idx already corresponds to the
    received MSI number.

    Link: https://lore.kernel.org/r/20220110015018.26359-3-kabel@kernel.org
    Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
    Signed-off-by: Pali Rohár <pali@kernel.org>
    Signed-off-by: Marek Behún <kabel@kernel.org>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Signed-off-by: Marek Behún <kabel@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/pci/host/pci-aardvark.c | 10 +++-------
    1 file changed, 3 insertions(+), 7 deletions(-)

    --- a/drivers/pci/host/pci-aardvark.c
    +++ b/drivers/pci/host/pci-aardvark.c
    @@ -1036,7 +1036,7 @@ static void advk_pcie_remove_irq_domain(
    static void advk_pcie_handle_msi(struct advk_pcie *pcie)
    {
    u32 msi_val, msi_mask, msi_status, msi_idx;
    - u16 msi_data;
    + int virq;

    msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
    msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
    @@ -1046,13 +1046,9 @@ static void advk_pcie_handle_msi(struct
    if (!(BIT(msi_idx) & msi_status))
    continue;

    - /*
    - * msi_idx contains bits [4:0] of the msi_data and msi_data
    - * contains 16bit MSI interrupt number
    - */
    advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);
    - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK;
    - generic_handle_irq(msi_data);
    + virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx);
    + generic_handle_irq(virq);
    }

    advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING,

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