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SubjectRe: [PATCH v11 00/16] Introduce Architectural LBR for vPMU
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On 5/10/2022 11:55 PM, Paolo Bonzini wrote:
> On 5/6/22 05:32, Yang Weijiang wrote:
>> [0] https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
>> [1] https://lore.kernel.org/lkml/1593780569-62993-1-git-send-email-kan.liang@linux.intel.com/
>>
>> Qemu patch:
>> https://patchwork.ozlabs.org/project/qemu-devel/cover/20220215195258.29149-1-weijiang.yang@intel.com/
>>
>> Previous version:
>> v10: https://lore.kernel.org/all/20220422075509.353942-1-weijiang.yang@intel.com/
>>
>> Changes in v11:
>> 1. Moved MSR_ARCH_LBR_DEPTH/CTL check code to a unified function.[Kan]
>> 2. Modified some commit messages per Kan's feedback.
>> 3. Rebased the patch series to 5.18-rc5.
> Thanks, this is mostly okay; the only remaining issues are Kan's
> feedback and saving/restoring on SMM enter/exit.
Thanks Paolo, I'll fix Kan's feedback and the issue you mentioned in
next version.
>
> The QEMU patches look good too.
>
> Paolo

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