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SubjectRe: [PATCH] PCI: rockchip: Enable the phy driver when controller is enabled
On Tue, Oct 19, 2021 at 09:02:15PM +0900, Punit Agrawal wrote:
> The PCI controller on rk3399 requires the phy to correctly initialise
> the PCIE phy. Without phy initialisation the host and end-point
> controllers cannot be used.
>
> To prevent building an unusable PCIe driver on rk3399, enable the phy
> driver when the host or end-point driver is enabled.
>
> Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
> ---
> Hi,
>
> I've been caught out many times when booting off of PCI and finding
> that the kernel cannot find rootfs due to the missing phy driver. The
> patch should prevents this by fixing the Kconfig dependency
> enablement.
>
> Thanks,
> Punit
>
> drivers/pci/controller/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)

Shawn, Heiko,

can I go ahead with this patch please ?

Thanks,
Lorenzo

> diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
> index 326f7d13024f..1965df38c4a3 100644
> --- a/drivers/pci/controller/Kconfig
> +++ b/drivers/pci/controller/Kconfig
> @@ -214,6 +214,7 @@ config PCIE_ROCKCHIP_HOST
> depends on PCI_MSI_IRQ_DOMAIN
> select MFD_SYSCON
> select PCIE_ROCKCHIP
> + select PHY_ROCKCHIP_PCIE
> help
> Say Y here if you want internal PCI support on Rockchip SoC.
> There is 1 internal PCIe port available to support GEN2 with
> @@ -226,6 +227,7 @@ config PCIE_ROCKCHIP_EP
> depends on PCI_ENDPOINT
> select MFD_SYSCON
> select PCIE_ROCKCHIP
> + select PHY_ROCKCHIP_PCIE
> help
> Say Y here if you want to support Rockchip PCIe controller in
> endpoint mode on Rockchip SoC. There is 1 internal PCIe port
> --
> 2.33.0
>

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