Messages in this thread | | | Date | Fri, 8 Apr 2022 11:00:00 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH 1/2] x86/cpufeatures: Add virtual TSC_AUX feature bit |
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On Thu, Apr 07, 2022 at 07:57:50PM -0500, Babu Moger wrote: > The TSC_AUX Virtualization feature allows AMD SEV-ES guests to securely use > TSC_AUX (auxiliary time stamp counter data) MSR in RDTSCP and RDPID > instructions. > > The TSC_AUX MSR is typically initialized to APIC ID or another unique > identifier so that software can quickly associate returned TSC value > with the logical processor. > > Adds the feature bit and also include it in the kvm for detection.
s/Adds/Add/
> > Signed-off-by: Babu Moger <babu.moger@amd.com> > --- > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/kvm/cpuid.c | 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-)
With that fixed:
Acked-by: Borislav Petkov <bp@suse.de>
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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