Messages in this thread | | | Date | Thu, 7 Apr 2022 09:09:02 +0800 | Subject | Re: [RFC PATCH v5 086/104] KVM: TDX: handle ept violation/misconfig exit | From | Xiaoyao Li <> |
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On 4/7/2022 4:50 AM, Sagi Shahar wrote: > On Fri, Mar 4, 2022 at 12:23 PM <isaku.yamahata@intel.com> wrote: >> >> From: Isaku Yamahata <isaku.yamahata@intel.com> >> >> On EPT violation, call a common function, __vmx_handle_ept_violation() to >> trigger x86 MMU code. On EPT misconfiguration, exit to ring 3 with >> KVM_EXIT_UNKNOWN. because EPT misconfiguration can't happen as MMIO is >> trigged by TDG.VP.VMCALL. No point to set a misconfiguration value for the >> fast path. >> >> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> >> --- >> arch/x86/kvm/vmx/tdx.c | 40 ++++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 38 insertions(+), 2 deletions(-) >> >> diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c >> index 6fbe89bcfe1e..2c35dcad077e 100644 >> --- a/arch/x86/kvm/vmx/tdx.c >> +++ b/arch/x86/kvm/vmx/tdx.c >> @@ -1081,6 +1081,40 @@ void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode, >> __vmx_deliver_posted_interrupt(vcpu, &tdx->pi_desc, vector); >> } >> >> +#define TDX_SEPT_PFERR (PFERR_WRITE_MASK | PFERR_USER_MASK) > > TDX_SEPT_PFERR is defined using PFERR_.* bitmask but > __vmx_handle_ept_violation is accepting an EPT_VIOLATION_.* bitmask. > so (PFERR_WRITE_MASK | PFERR_USER_MASK) will get interpreted as > (EPT_VIOLATION_ACC_WRITE | EPT_VIOLATION_ACC_INSTR) which will get > translated to (PFERR_WRITE_MASK | PFERR_FETCH_MASK). Was that the > intention of this code?
No. It's a mistake. We have corrected internally you can find corrected code in github repo or see it in next version.
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