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    Subject[PATCH v5 2/8] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl
    Date
    Override the I2Cs, LPUARTs, audio_ipg_clk and dma_ipg_clk with
    the i.MX8DXL specific properties.

    Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
    Signed-off-by: Jacky Bai <ping.bai@nxp.com>
    Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
    ---
    .../boot/dts/freescale/imx8dxl-ss-adma.dtsi | 52 +++++++++++++++++++
    1 file changed, 52 insertions(+)
    create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi

    diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
    new file mode 100644
    index 000000000000..4d0c75bad74c
    --- /dev/null
    +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
    @@ -0,0 +1,52 @@
    +// SPDX-License-Identifier: GPL-2.0+
    +/*
    + * Copyright 2019-2021 NXP
    + */
    +
    +&audio_ipg_clk {
    + clock-frequency = <160000000>;
    +};
    +
    +&dma_ipg_clk {
    + clock-frequency = <160000000>;
    +};
    +
    +&i2c0 {
    + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
    + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
    +};
    +
    +&i2c1 {
    + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
    + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
    +};
    +
    +&i2c2 {
    + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
    + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
    +};
    +
    +&i2c3 {
    + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
    + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
    +};
    +
    +&lpuart0 {
    + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
    + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
    +};
    +
    +&lpuart1 {
    + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
    + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
    +};
    +
    +&lpuart2 {
    + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
    + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
    +};
    +
    +&lpuart3 {
    + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
    + interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
    +};
    --
    2.34.1
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