lkml.org 
[lkml]   [2022]   [Apr]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v4 6/6] arm64: Enable perf events based hard lockup detector
    Date
    With the recent feature added to enable perf events to use pseudo NMIs
    as interrupts on platforms which support GICv3 or later, its now been
    possible to enable hard lockup detector (or NMI watchdog) on arm64
    platforms. So enable corresponding support.

    One thing to note here is that normally lockup detector is initialized
    just after the early initcalls but PMU on arm64 comes up much later as
    device_initcall(). To cope with that, overriding watchdog_nmi_probe() to
    let the watchdog framework know PMU not ready, and inform the framework
    to re-initialize lockup detection once PMU has been initialized.

    [1]: http://lore.kernel.org/linux-arm-kernel/1610712101-14929-1-git-send-email-sumit.garg@linaro.org

    Co-developed-by: Sumit Garg <sumit.garg@linaro.org>
    Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
    Co-developed-by: Pingfan Liu <kernelfans@gmail.com>
    Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
    Signed-off-by: Lecopzer Chen <lecopzer.chen@mediatek.com>
    ---
    arch/arm64/Kconfig | 2 ++
    arch/arm64/kernel/perf_event.c | 10 ++++++++--
    arch/arm64/kernel/watchdog_hld.c | 14 ++++++++++++++
    drivers/perf/arm_pmu.c | 5 +++++
    include/linux/perf/arm_pmu.h | 2 ++
    5 files changed, 31 insertions(+), 2 deletions(-)

    diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
    index 20ea89d9ac2f..9d48fe4ce041 100644
    --- a/arch/arm64/Kconfig
    +++ b/arch/arm64/Kconfig
    @@ -184,12 +184,14 @@ config ARM64
    select HAVE_FUNCTION_ERROR_INJECTION
    select HAVE_FUNCTION_GRAPH_TRACER
    select HAVE_GCC_PLUGINS
    + select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
    select HAVE_HW_BREAKPOINT if PERF_EVENTS
    select HAVE_IRQ_TIME_ACCOUNTING
    select HAVE_KVM
    select HAVE_NMI
    select HAVE_PATA_PLATFORM
    select HAVE_PERF_EVENTS
    + select HAVE_PERF_EVENTS_NMI if ARM64_PSEUDO_NMI
    select HAVE_PERF_REGS
    select HAVE_PERF_USER_STACK_DUMP
    select HAVE_PREEMPT_DYNAMIC_KEY
    diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
    index cb69ff1e6138..d51ee09592d7 100644
    --- a/arch/arm64/kernel/perf_event.c
    +++ b/arch/arm64/kernel/perf_event.c
    @@ -23,6 +23,7 @@
    #include <linux/platform_device.h>
    #include <linux/sched_clock.h>
    #include <linux/smp.h>
    +#include <linux/nmi.h>

    /* ARMv8 Cortex-A53 specific event types. */
    #define ARMV8_A53_PERFCTR_PREF_LINEFILL 0xC2
    @@ -1390,10 +1391,15 @@ static struct platform_driver armv8_pmu_driver = {

    static int __init armv8_pmu_driver_init(void)
    {
    + int ret;
    +
    if (acpi_disabled)
    - return platform_driver_register(&armv8_pmu_driver);
    + ret = platform_driver_register(&armv8_pmu_driver);
    else
    - return arm_pmu_acpi_probe(armv8_pmuv3_pmu_init);
    + ret = arm_pmu_acpi_probe(armv8_pmuv3_pmu_init);
    +
    + retry_lockup_detector_init();
    + return ret;
    }
    device_initcall(armv8_pmu_driver_init)

    diff --git a/arch/arm64/kernel/watchdog_hld.c b/arch/arm64/kernel/watchdog_hld.c
    index de43318e4dd6..c9c6ec889c15 100644
    --- a/arch/arm64/kernel/watchdog_hld.c
    +++ b/arch/arm64/kernel/watchdog_hld.c
    @@ -1,5 +1,7 @@
    // SPDX-License-Identifier: GPL-2.0
    +#include <linux/nmi.h>
    #include <linux/cpufreq.h>
    +#include <linux/perf/arm_pmu.h>

    /*
    * Safe maximum CPU frequency in case a particular platform doesn't implement
    @@ -23,3 +25,15 @@ u64 hw_nmi_get_sample_period(int watchdog_thresh)
    return (u64)max_cpu_freq * watchdog_thresh;
    }

    +int __init watchdog_nmi_probe(void)
    +{
    + /*
    + * hardlockup_detector_perf_init() will success even if Pseudo-NMI turns off,
    + * however, the pmu interrupts will act like a normal interrupt instead of
    + * NMI and the hardlockup detector would be broken.
    + */
    + if (!arm_pmu_irq_is_nmi())
    + return -ENODEV;
    +
    + return hardlockup_detector_perf_init();
    +}
    diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
    index 59d3980b8ca2..ceee2c55d436 100644
    --- a/drivers/perf/arm_pmu.c
    +++ b/drivers/perf/arm_pmu.c
    @@ -697,6 +697,11 @@ static int armpmu_get_cpu_irq(struct arm_pmu *pmu, int cpu)
    return per_cpu(hw_events->irq, cpu);
    }

    +bool arm_pmu_irq_is_nmi(void)
    +{
    + return has_nmi;
    +}
    +
    /*
    * PMU hardware loses all context when a CPU goes offline.
    * When a CPU is hotplugged back in, since some hardware registers are
    diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
    index 0407a38b470a..29c56c92bab7 100644
    --- a/include/linux/perf/arm_pmu.h
    +++ b/include/linux/perf/arm_pmu.h
    @@ -171,6 +171,8 @@ void kvm_host_pmu_init(struct arm_pmu *pmu);
    #define kvm_host_pmu_init(x) do { } while(0)
    #endif

    +bool arm_pmu_irq_is_nmi(void);
    +
    /* Internal functions only for core arm_pmu code */
    struct arm_pmu *armpmu_alloc(void);
    struct arm_pmu *armpmu_alloc_atomic(void);
    --
    2.25.1
    \
     
     \ /
      Last update: 2022-04-27 18:18    [W:2.471 / U:0.896 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site