Messages in this thread | | | From | Ali Saidi <> | Subject | [PATCH v4 0/4] perf: arm-spe: Decode SPE source and use for perf c2c | Date | Tue, 26 Apr 2022 13:59:32 +0000 |
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When synthesizing data from SPE, augment the type with source information for Arm Neoverse cores so we can detect situtions like cache line contention and transfers on Arm platforms.
This changes enables future changes to c2c on a system with SPE where lines that are shared among multiple cores show up in perf c2c output.
Changes in v7: * Minor change requested by Leo Yan
Changes in v6: * Drop changes to c2c command which will come from Leo Yan
Changes in v5: * Add a new snooping type to disambiguate cache-to-cache transfers where we don't know if the data is clean or dirty. * Set snoop flags on all the data-source cases * Special case stores as we have no information on them
Changes in v4: * Bring-in the kernel's arch/arm64/include/asm/cputype.h into tools/ * Add neoverse-v1 to the neoverse cores list
Ali Saidi (4): tools: arm64: Import cputype.h perf arm-spe: Use SPE data source for neoverse cores perf mem: Support mem_lvl_num in c2c command perf mem: Support HITM for when mem_lvl_num is any
tools/arch/arm64/include/asm/cputype.h | 258 ++++++++++++++++++ .../util/arm-spe-decoder/arm-spe-decoder.c | 1 + .../util/arm-spe-decoder/arm-spe-decoder.h | 12 + tools/perf/util/arm-spe.c | 110 +++++++- tools/perf/util/mem-events.c | 20 +- 5 files changed, 383 insertions(+), 18 deletions(-) create mode 100644 tools/arch/arm64/include/asm/cputype.h
-- 2.32.0
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