Messages in this thread | | | Date | Tue, 26 Apr 2022 08:30:25 +0100 | Subject | Re: [Patch v2] iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu | From | Jon Hunter <> |
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Hi Will,
On 22/04/2022 11:55, Will Deacon wrote: > On Thu, 21 Apr 2022 13:45:04 +0530, Ashish Mhetre wrote: >> Tegra194 and Tegra234 SoCs have the erratum that causes walk cache >> entries to not be invalidated correctly. The problem is that the walk >> cache index generated for IOVA is not same across translation and >> invalidation requests. This is leading to page faults when PMD entry is >> released during unmap and populated with new PTE table during subsequent >> map request. Disabling large page mappings avoids the release of PMD >> entry and avoid translations seeing stale PMD entry in walk cache. >> Fix this by limiting the page mappings to PAGE_SIZE for Tegra194 and >> Tegra234 devices. This is recommended fix from Tegra hardware design >> team. >> >> [...] > > Applied to will (for-joerg/arm-smmu/fixes), thanks! > > [1/1] iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu > https://git.kernel.org/will/c/4a25f2ea0e03 >
Thanks for applying. Sorry to be late to the party, but feel free to add my ...
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Also any chance we could tag for stable? Probably the most appropriate fixes-tag would be ...
Fixes: aab5a1c88276 ("iommu/arm-smmu: add NVIDIA implementation for ARM MMU-500 usage")
Thanks! Jon
-- nvpublic
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