Messages in this thread Patch in this message | | | From | Srinivasa Rao Mandadapu <> | Subject | [PATCH v11 2/4] arm64: dts: qcom: sc7280: Add MI2S pinmux specifications for CRD 3.0/3.1 | Date | Tue, 26 Apr 2022 12:51:04 +0530 |
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Add drive strength property for primary and secondary MI2S on sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> --- arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 34 ++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index d58045d..4c4a0e9 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -588,6 +588,40 @@ ap_ec_spi: &spi10 { bias-disable; }; +&mi2s0_data0 { + drive-strength = <6>; +}; + +&mi2s0_data1 { + drive-strength = <6>; +}; + +&mi2s0_mclk { + drive-strength = <6>; +}; + +&mi2s0_sclk { + drive-strength = <6>; +}; + +&mi2s0_ws { + drive-strength = <6>; +}; + +&mi2s1_data0 { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_sclk { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_ws { + drive-strength = <6>; +}; + &pcie1_clkreq_n { bias-pull-up; drive-strength = <2>; -- 2.7.4
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