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SubjectRe: [PATCH net] net: dsa: lantiq_gswip: Don't set GSWIP_MII_CFG_RMII_CLK
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On 4/25/22 17:20, Martin Blumenstingl wrote:
> Commit 4b5923249b8fa4 ("net: dsa: lantiq_gswip: Configure all remaining
> GSWIP_MII_CFG bits") added all known bits in the GSWIP_MII_CFGp
> register. It helped bring this register into a well-defined state so the
> driver has to rely less on the bootloader to do things right.
> Unfortunately it also sets the GSWIP_MII_CFG_RMII_CLK bit without any
> possibility to configure it. Upon further testing it turns out that all
> boards which are supported by the GSWIP driver in OpenWrt which use an
> RMII PHY have a dedicated oscillator on the board which provides the
> 50MHz RMII reference clock.
>
> Don't set the GSWIP_MII_CFG_RMII_CLK bit (but keep the code which always
> clears it) to fix support for the Fritz!Box 7362 SL in OpenWrt. This is
> a board with two Atheros AR8030 RMII PHYs. With the "RMII clock" bit set
> the MAC also generates the RMII reference clock whose signal then
> conflicts with the signal from the oscillator on the board. This results
> in a constant cycle of the PHY detecting link up/down (and as a result
> of that: the two ports using the AR8030 PHYs are not working).
>
> At the time of writing this patch there's no known board where the MAC
> (GSWIP) has to generate the RMII reference clock. If needed this can be
> implemented in future by providing a device-tree flag so the
> GSWIP_MII_CFG_RMII_CLK bit can be toggled per port.
>
> Fixes: 4b5923249b8fa4 ("net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits")
> Cc: stable@vger.kernel.org
> Tested-by: Jan Hoffmann <jan@3e8.eu>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Acked-by: Hauke Mehrtens <hauke@hauke-m.de>

Looks like Linux does not have a standard device tree flag to indicate
that MAC should provide the RMII clock. Deactivating it is probably a
good solution.

> ---
> drivers/net/dsa/lantiq_gswip.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
> index a416240d001b..12c15da55664 100644
> --- a/drivers/net/dsa/lantiq_gswip.c
> +++ b/drivers/net/dsa/lantiq_gswip.c
> @@ -1681,9 +1681,6 @@ static void gswip_phylink_mac_config(struct dsa_switch *ds, int port,
> break;
> case PHY_INTERFACE_MODE_RMII:
> miicfg |= GSWIP_MII_CFG_MODE_RMIIM;
> -
> - /* Configure the RMII clock as output: */
> - miicfg |= GSWIP_MII_CFG_RMII_CLK;
> break;
> case PHY_INTERFACE_MODE_RGMII:
> case PHY_INTERFACE_MODE_RGMII_ID:

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