Messages in this thread | | | From | Chen-Yu Tsai <> | Date | Tue, 19 Apr 2022 14:59:06 +0800 | Subject | Re: [PATCH 2/7] clk: mediatek: reset: Rename reset function |
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On Tue, Apr 19, 2022 at 2:37 PM Rex-BC Chen <rex-bc.chen@mediatek.com> wrote: > > On Tue, 2022-04-19 at 13:57 +0800, Chen-Yu Tsai wrote: > > On Mon, Apr 18, 2022 at 9:22 PM Rex-BC Chen <rex-bc.chen@mediatek.com > > > wrote: > > > > > > There are two version for clock reset register control of MediaTek > > > SoCs. > > > Since MT8183, the version 2 is adopted. > > > > > > To make the driver more readable, > > > - Rename them to v2 for MT8183 and v1 for previous SoCs. > > > - Adjust the fuinction order in reset.c. > > > > I'm not sure that the renaming actually helps, since it is not given > > that > > people outside of MediaTek would know which chip use which version. > > The > > original name of "_set_clr" at least relays how the hardware works, > > which > > coupled with the register naming in the datasheets make it quite > > obvious > > if the hardware is using the "set/clr" variant. > > > > On a different note, the v1 hardware, where a hardware bit represents > > the > > state, is quite common, and there is a common reset driver that > > handles it. > > Perhaps that could be reused instead of code duplicated? > > See drivers/reset/reset-simple.c. > > > > > > Thanks > > ChenYu > > Hello ChenYu, > > Thanks for your review. > I will use reset_simple_ops to replace v1 in next version. > > What do you think the proper name of v2? > Or I just use mtk_reset_assert for v2?
I would just keep the current name.
ChenYu
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