Messages in this thread | | | From | Frank Wunderlich <> | Subject | Aw: Re: [RFC/RFT 2/6] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf | Date | Tue, 19 Apr 2022 19:29:08 +0200 |
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> Gesendet: Montag, 18. April 2022 um 17:54 Uhr > Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
> > --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > > +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > > @@ -14,6 +14,8 @@ properties: > > oneOf: > > - items: > > - enum: > > + - rockchip,pcie30-phy-grf > > + - rockchip,pcie30-pipe-grf > > These are without SoC parts. Are these PCIe v3 General Register Files > part of some PCIe spec?
imho they are shared across SoCs rk3568 and rk3588, but have only seen rk3568 implementation yet. PCIe driver currently supports these 2 Soc (different offsets in the Phy-GRF), but can only test rk3568.
pipe-grf seems only be used for rk35688 (offset used in probe is defined for this SoC), which i cannot test.
so i have left them SoC independed.
> > - rockchip,rk3288-sgrf > > - rockchip,rk3566-pipe-grf > > - rockchip,rk3568-usb2phy-grf
regards Frank
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