Messages in this thread | | | Date | Fri, 15 Apr 2022 14:39:51 -0700 | From | Matthias Kaehlcke <> | Subject | Re: [PATCH v12 5/7] pinctrl: qcom: Extract chip specific LPASS LPI code |
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On Wed, Mar 16, 2022 at 09:47:04PM +0530, Srinivasa Rao Mandadapu wrote: > Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver > to allow reusing the common code in the addition of subsequent > platforms. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> > Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> > ... > > diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c > new file mode 100644 > index 0000000..8c95d0f > --- /dev/null > +++ b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c
...
> + > +/* sm8250 variant specific data */
nit: the comment seems a bit redundant since this is now the sm8250 pinctrl driver.
> +static const struct pinctrl_pin_desc sm8250_lpi_pins[] = { > + PINCTRL_PIN(0, "gpio0"), > + PINCTRL_PIN(1, "gpio1"), > + PINCTRL_PIN(2, "gpio2"), > + PINCTRL_PIN(3, "gpio3"), > + PINCTRL_PIN(4, "gpio4"), > + PINCTRL_PIN(5, "gpio5"), > + PINCTRL_PIN(6, "gpio6"), > + PINCTRL_PIN(7, "gpio7"), > + PINCTRL_PIN(8, "gpio8"), > + PINCTRL_PIN(9, "gpio9"), > + PINCTRL_PIN(10, "gpio10"), > + PINCTRL_PIN(11, "gpio11"), > + PINCTRL_PIN(12, "gpio12"), > + PINCTRL_PIN(13, "gpio13"), > +}; > > ...
The nit is just a nit and otherwise this looks good to me, so:
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
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