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SubjectRe: [PATCH v2 2/2] clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk
On 22:03-20220415, Georgi Vlaev wrote:
> AM62 has 3 instances of EPWM modules. Each EPWM module has
> an EPWM TBCLKEN module input used to individually enable or
> disable its EPWM time-base clock. The EPWM time-base clock
> enable input comes from the CTRLMMR_EPWM_TB_CLKEN register
> bits 0 to 2 in CTRL_MMR0 module (6.1.1.4.1.48 [1]). This
> is virtually the same setup as in AM64 but with 3 instead
> of 9 clock providers on AM62.
>
> Update the driver with the 3 instances of clocks associated
> to a new compatible: "ti,am62-epwm-tbclk".
>
> [1] https://www.ti.com/lit/pdf/spruiv7
>
> Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
> Tested-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
> drivers/clk/keystone/syscon-clk.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/clk/keystone/syscon-clk.c b/drivers/clk/keystone/syscon-clk.c
> index aae1a4076281..19198325b909 100644
> --- a/drivers/clk/keystone/syscon-clk.c
> +++ b/drivers/clk/keystone/syscon-clk.c
> @@ -162,6 +162,13 @@ static const struct ti_syscon_gate_clk_data am64_clk_data[] = {
> { /* Sentinel */ },
> };
>
> +static const struct ti_syscon_gate_clk_data am62_clk_data[] = {
> + TI_SYSCON_CLK_GATE("epwm_tbclk0", 0x0, 0),
> + TI_SYSCON_CLK_GATE("epwm_tbclk1", 0x0, 1),
> + TI_SYSCON_CLK_GATE("epwm_tbclk2", 0x0, 2),

Reviewed-by: Nishanth Menon <nm@ti.com>

Thanks for reordering.

> + { /* Sentinel */ },
> +};
> +
> static const struct of_device_id ti_syscon_gate_clk_ids[] = {
> {
> .compatible = "ti,am654-ehrpwm-tbclk",
> @@ -171,6 +178,10 @@ static const struct of_device_id ti_syscon_gate_clk_ids[] = {
> .compatible = "ti,am64-epwm-tbclk",
> .data = &am64_clk_data,
> },
> + {
> + .compatible = "ti,am62-epwm-tbclk",
> + .data = &am62_clk_data,
> + },
> { }
> };
> MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids);
> --
> 2.30.2
>

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D

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