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    Subject[PATCH 5.17 269/343] mmc: renesas_sdhi: special 4tap settings only apply to HS400
    Date
    From: Wolfram Sang <wsa+renesas@sang-engineering.com>

    commit 46d4820f949a3030b19ee482c68a50b06dd27590 upstream.

    Previous documentation was vague, so we included SDR104 for slow SDnH
    clock settings. It turns out now, that it is only needed for HS400.

    Fixes: bb6d3fa98a41 ("clk: renesas: rcar-gen3: Switch to new SD clock handling")
    Cc: stable@vger.kernel.org
    Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
    Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    Link: https://lore.kernel.org/r/20220404100508.3209-1-wsa+renesas@sang-engineering.com
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/mmc/host/renesas_sdhi_core.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    --- a/drivers/mmc/host/renesas_sdhi_core.c
    +++ b/drivers/mmc/host/renesas_sdhi_core.c
    @@ -144,9 +144,9 @@ static unsigned int renesas_sdhi_clk_upd
    return clk_get_rate(priv->clk);

    if (priv->clkh) {
    + /* HS400 with 4TAP needs different clock settings */
    bool use_4tap = priv->quirks && priv->quirks->hs400_4taps;
    - bool need_slow_clkh = (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104) ||
    - (host->mmc->ios.timing == MMC_TIMING_MMC_HS400);
    + bool need_slow_clkh = host->mmc->ios.timing == MMC_TIMING_MMC_HS400;
    clkh_shift = use_4tap && need_slow_clkh ? 1 : 2;
    ref_clk = priv->clkh;
    }

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