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    Subject[PATCH 5.17 297/343] perf/x86/intel: Dont extend the pseudo-encoding to GP counters
    Date
    From: Kan Liang <kan.liang@linux.intel.com>

    commit 4a263bf331c512849062805ef1b4ac40301a9829 upstream.

    The INST_RETIRED.PREC_DIST event (0x0100) doesn't count on SPR.
    perf stat -e cpu/event=0xc0,umask=0x0/,cpu/event=0x0,umask=0x1/ -C0

    Performance counter stats for 'CPU(s) 0':

    607,246 cpu/event=0xc0,umask=0x0/
    0 cpu/event=0x0,umask=0x1/

    The encoding for INST_RETIRED.PREC_DIST is pseudo-encoding, which
    doesn't work on the generic counters. However, current perf extends its
    mask to the generic counters.

    The pseudo event-code for a fixed counter must be 0x00. Check and avoid
    extending the mask for the fixed counter event which using the
    pseudo-encoding, e.g., ref-cycles and PREC_DIST event.

    With the patch,
    perf stat -e cpu/event=0xc0,umask=0x0/,cpu/event=0x0,umask=0x1/ -C0

    Performance counter stats for 'CPU(s) 0':

    583,184 cpu/event=0xc0,umask=0x0/
    583,048 cpu/event=0x0,umask=0x1/

    Fixes: 2de71ee153ef ("perf/x86/intel: Fix ICL/SPR INST_RETIRED.PREC_DIST encodings")
    Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Cc: stable@vger.kernel.org
    Link: https://lkml.kernel.org/r/1648482543-14923-1-git-send-email-kan.liang@linux.intel.com
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/x86/events/intel/core.c | 6 +++++-
    arch/x86/include/asm/perf_event.h | 5 +++++
    2 files changed, 10 insertions(+), 1 deletion(-)

    --- a/arch/x86/events/intel/core.c
    +++ b/arch/x86/events/intel/core.c
    @@ -5515,7 +5515,11 @@ static void intel_pmu_check_event_constr
    /* Disabled fixed counters which are not in CPUID */
    c->idxmsk64 &= intel_ctrl;

    - if (c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES)
    + /*
    + * Don't extend the pseudo-encoding to the
    + * generic counters
    + */
    + if (!use_fixed_pseudo_encoding(c->code))
    c->idxmsk64 |= (1ULL << num_counters) - 1;
    }
    c->idxmsk64 &=
    --- a/arch/x86/include/asm/perf_event.h
    +++ b/arch/x86/include/asm/perf_event.h
    @@ -241,6 +241,11 @@ struct x86_pmu_capability {
    #define INTEL_PMC_IDX_FIXED_SLOTS (INTEL_PMC_IDX_FIXED + 3)
    #define INTEL_PMC_MSK_FIXED_SLOTS (1ULL << INTEL_PMC_IDX_FIXED_SLOTS)

    +static inline bool use_fixed_pseudo_encoding(u64 code)
    +{
    + return !(code & 0xff);
    +}
    +
    /*
    * We model BTS tracing as another fixed-mode PMC.
    *

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