Messages in this thread Patch in this message | | | From | isaku.yamahata@intel ... | Subject | [RFC PATCH v5 091/104] KVM: TDX: Handle TDX PV CPUID hypercall | Date | Fri, 4 Mar 2022 11:49:47 -0800 |
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From: Isaku Yamahata <isaku.yamahata@intel.com>
Wire up TDX PV CPUID hypercall to the KVM backend function.
Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> --- arch/x86/kvm/vmx/tdx.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 53f59fb92dcf..f7c9170d596a 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -893,6 +893,30 @@ static int tdx_emulate_vmcall(struct kvm_vcpu *vcpu) return 1; } +static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu) +{ + u32 eax, ebx, ecx, edx; + + /* EAX and ECX for cpuid is stored in R12 and R13. */ + eax = tdvmcall_p1_read(vcpu); + ecx = tdvmcall_p2_read(vcpu); + + kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true); + + /* + * The returned value for CPUID (EAX, EBX, ECX, and EDX) is stored into + * R12, R13, R14, and R15. + */ + tdvmcall_p1_write(vcpu, eax); + tdvmcall_p2_write(vcpu, ebx); + tdvmcall_p3_write(vcpu, ecx); + tdvmcall_p4_write(vcpu, edx); + + tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_SUCCESS); + + return 1; +} + static int handle_tdvmcall(struct kvm_vcpu *vcpu) { struct vcpu_tdx *tdx = to_tdx(vcpu); @@ -904,6 +928,9 @@ static int handle_tdvmcall(struct kvm_vcpu *vcpu) return tdx_emulate_vmcall(vcpu); switch (tdvmcall_exit_reason(vcpu)) { + case EXIT_REASON_CPUID: + return tdx_emulate_cpuid(vcpu); + default: break; } -- 2.25.1
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