Messages in this thread Patch in this message | | | Date | Thu, 24 Mar 2022 19:21:42 +0100 | Subject | Re: [PATCH v4 2/6] KVM: x86: nSVM: implement nested LBR virtualization | From | Paolo Bonzini <> |
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On 3/22/22 18:40, Maxim Levitsky wrote: > + /* Copy LBR related registers from vmcb12, > + * but make sure that we only pick LBR enable bit from the guest. > + */ > + svm_copy_lbrs(vmcb02, vmcb12); > + vmcb02->save.dbgctl &= LBR_CTL_ENABLE_MASK;
I still do not understand why it is not copying all bits outside DEBUGCTL_RESERVED_BITS. That is:
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index c1baa3a68ce6..f1332d802ec8 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -589,11 +589,12 @@ static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12 } if (unlikely(svm->lbrv_enabled && (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) { - /* Copy LBR related registers from vmcb12, - * but make sure that we only pick LBR enable bit from the guest. + /* + * Reserved bits of DEBUGCTL are ignored. Be consistent with + * svm_set_msr's definition of reserved bits. */ svm_copy_lbrs(vmcb02, vmcb12); - vmcb02->save.dbgctl &= LBR_CTL_ENABLE_MASK; + vmcb02->save.dbgctl &= ~DEBUGCTL_RESERVED_BITS; svm_update_lbrv(&svm->vcpu); } else if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK)) { diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 54fa048069b2..a6282be4e419 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -62,8 +62,6 @@ MODULE_DEVICE_TABLE(x86cpu, svm_cpu_id); #define SEG_TYPE_LDT 2 #define SEG_TYPE_BUSY_TSS16 3 -#define DEBUGCTL_RESERVED_BITS (~(0x3fULL)) - static bool erratum_383_found __read_mostly; u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index cade032520cb..b687393e86ad 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -487,6 +487,8 @@ static inline bool nested_npt_enabled(struct vcpu_svm *svm) /* svm.c */ #define MSR_INVALID 0xffffffffU +#define DEBUGCTL_RESERVED_BITS (~(0x3fULL)) + extern bool dump_invalid_vmcb; u32 svm_msrpm_offset(u32 msr);
> + svm_update_lbrv(&svm->vcpu); > + > + } else if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK)) { > svm_copy_lbrs(vmcb02, vmcb01);
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