Messages in this thread Patch in this message | | | Date | Wed, 23 Mar 2022 21:37:13 +0100 | From | Petr Vorel <> | Subject | Re: [PATCH] clk: qcom: gcc-msm8994: Fix gpll4 width |
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Hi Konrad,
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
> The gpll4 postdiv is actually a div4, so make sure that Linux is aware of > this.
> This fixes the following error messages:
> [ 0.804491] mmc1: Card appears overclocked; req 200000000 Hz, actual 343999999 Hz > [ 0.805057] mmc1: Card appears overclocked; req 400000000 Hz, actual 687999999 Hz yes, this works on my patchset [1] even without these workarounds (I'll submit v5 without it)
+ assigned-clocks = <&gcc GPLL4_EARLY>; + assigned-clock-rates = <384000000>;
Tested-by: Petr Vorel <petr.vorel@gmail.com>
Kind regards, Petr
[1] https://lore.kernel.org/linux-arm-msm/20220218203710.895-1-petr.vorel@gmail.com/
> Fixes: aec89f78cf01 ("clk: qcom: Add support for msm8994 global clock controller")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> > --- > Cc: Petr Vorel <petr.vorel@gmail.com>
> drivers/clk/qcom/gcc-msm8994.c | 1 + > 1 file changed, 1 insertion(+)
> diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c > index f09499999eb3..6b702cdacbf2 100644 > --- a/drivers/clk/qcom/gcc-msm8994.c > +++ b/drivers/clk/qcom/gcc-msm8994.c > @@ -77,6 +77,7 @@ static struct clk_alpha_pll gpll4_early = {
> static struct clk_alpha_pll_postdiv gpll4 = { > .offset = 0x1dc0, > + .width = 4, > .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], > .clkr.hw.init = &(struct clk_init_data){ > .name = "gpll4",
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