Messages in this thread | | | Date | Tue, 22 Mar 2022 15:06:27 -0700 (PDT) | Subject | Re: [ammarfaizi2-block:palmer/linux/riscv-pmu 13/15] drivers/perf/riscv_pmu_sbi.c:498: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst | From | Palmer Dabbelt <> |
| |
On Tue, 22 Mar 2022 06:24:04 PDT (-0700), lkp@intel.com wrote: > tree: https://github.com/ammarfaizi2/linux-block palmer/linux/riscv-pmu > head: 33363c336516e4beb9dd7e8265b369ff96d07dcb > commit: 4905ec2fb7e6421c14c9fb7276f5aa92f60f2b98 [13/15] RISC-V: Add sscofpmf extension support > config: riscv-randconfig-r006-20220320 (https://download.01.org/0day-ci/archive/20220322/202203222137.eK8TFhiJ-lkp@intel.com/config) > compiler: riscv64-linux-gcc (GCC) 11.2.0 > reproduce (this is a W=1 build): > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # https://github.com/ammarfaizi2/linux-block/commit/4905ec2fb7e6421c14c9fb7276f5aa92f60f2b98 > git remote add ammarfaizi2-block https://github.com/ammarfaizi2/linux-block > git fetch --no-tags ammarfaizi2-block palmer/linux/riscv-pmu > git checkout 4905ec2fb7e6421c14c9fb7276f5aa92f60f2b98 > # save the config file to linux build tree > mkdir build_dir > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/perf/ > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot <lkp@intel.com> > > All warnings (new ones prefixed by >>): > > drivers/perf/riscv_pmu_sbi.c:42: warning: cannot understand function prototype: 'union sbi_pmu_ctr_info *pmu_ctr_list; '
Looks like that's just fallout from the ** comments.
>>> drivers/perf/riscv_pmu_sbi.c:498: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
I sent a fix for this one, there were a handful of them. Sorry I missed that.
> * This function starts all the used counters in two step approach. > > > vim +498 drivers/perf/riscv_pmu_sbi.c > > 496 > 497 /** > > 498 * This function starts all the used counters in two step approach. > 499 * Any counter that did not overflow can be start in a single step > 500 * while the overflowed counters need to be started with updated initialization > 501 * value. > 502 */ > 503 static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu, > 504 unsigned long ctr_ovf_mask) > 505 { > 506 int idx = 0; > 507 struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events); > 508 struct perf_event *event; > 509 unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE; > 510 unsigned long ctr_start_mask = 0; > 511 uint64_t max_period; > 512 struct hw_perf_event *hwc; > 513 u64 init_val = 0; > 514 > 515 ctr_start_mask = cpu_hw_evt->used_hw_ctrs[0] & ~ctr_ovf_mask; > 516 > 517 /* Start all the counters that did not overflow in a single shot */ > 518 sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, 0, ctr_start_mask, > 519 0, 0, 0, 0); > 520 > 521 /* Reinitialize and start all the counter that overflowed */ > 522 while (ctr_ovf_mask) { > 523 if (ctr_ovf_mask & 0x01) { > 524 event = cpu_hw_evt->events[idx]; > 525 hwc = &event->hw; > 526 max_period = riscv_pmu_ctr_get_width_mask(event); > 527 init_val = local64_read(&hwc->prev_count) & max_period; > 528 sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1, > 529 flag, init_val, 0, 0); > 530 } > 531 ctr_ovf_mask = ctr_ovf_mask >> 1; > 532 idx++; > 533 } > 534 } > 535
| |