Messages in this thread | | | Date | Mon, 21 Mar 2022 18:22:00 +0800 | Subject | Re: [PATCH RFC 01/11] iommu: Add pasid_bits field in struct dev_iommu | From | Lu Baolu <> |
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On 2022/3/21 15:01, Tian, Kevin wrote: >> From: Lu Baolu<baolu.lu@linux.intel.com> >> Sent: Sunday, March 20, 2022 2:40 PM >> >> Use this field to save the pasid/ssid bits that a device is able to >> support with its IOMMU hardware. It is a generic attribute of a device >> and lifting it into the per-device dev_iommu struct makes it possible >> to allocate a PASID for device without calls into the IOMMU drivers. >> Any iommu driver which suports PASID related features should set this >> field before features are enabled on the devices. >> >> Signed-off-by: Lu Baolu<baolu.lu@linux.intel.com> >> --- >> include/linux/iommu.h | 1 + >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 + >> drivers/iommu/intel/iommu.c | 5 ++++- >> 3 files changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/include/linux/iommu.h b/include/linux/iommu.h >> index 6ef2df258673..36f43af0af53 100644 >> --- a/include/linux/iommu.h >> +++ b/include/linux/iommu.h >> @@ -368,6 +368,7 @@ struct dev_iommu { >> struct iommu_fwspec *fwspec; >> struct iommu_device *iommu_dev; >> void *priv; >> + unsigned int pasid_bits; >> }; >> >> int iommu_device_register(struct iommu_device *iommu, >> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> index 627a3ed5ee8f..8e262210b5ad 100644 >> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> @@ -2812,6 +2812,7 @@ static int arm_smmu_dev_enable_feature(struct >> device *dev, >> master->iopf_enabled = true; >> return 0; >> case IOMMU_DEV_FEAT_SVA: >> + dev->iommu->pasid_bits = master->ssid_bits; >> return arm_smmu_master_enable_sva(master); >> default: >> return -EINVAL; >> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c >> index 6f7485c44a4b..c1b91bce1530 100644 >> --- a/drivers/iommu/intel/iommu.c >> +++ b/drivers/iommu/intel/iommu.c >> @@ -4587,8 +4587,11 @@ static struct iommu_device >> *intel_iommu_probe_device(struct device *dev) >> if (pasid_supported(iommu)) { >> int features = pci_pasid_features(pdev); >> >> - if (features >= 0) >> + if (features >= 0) { >> info->pasid_supported = features | 1; >> + dev->iommu->pasid_bits = >> + fls(pci_max_pasids(pdev)) - 1; > Original intel_svm_alloc_pasid() covers both PCI and non-PCI devices: > > ioasid_t max_pasid = dev_is_pci(dev) ? > pci_max_pasids(to_pci_dev(dev)) : intel_pasid_max_id; > > though I'm not sure whether non-PCI SVA has been supported indeed, this > patch implies a functional change here. >
The info->pasid_supported is only set for PCI devices. So the status is that non-PCI SVA hasn't been supported. No functional change here from this point of view.
Best regards, baolu
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