Messages in this thread | | | Date | Tue, 22 Mar 2022 00:13:10 +0100 | From | Michael Walle <> | Subject | Re: [PATCH v2 6/8] mtd: spi-nor: core: Add helpers to read/write any register |
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Am 2022-02-28 12:17, schrieb Tudor Ambarus: > There are manufacturers that use registers indexed by address. Some of > them support "read/write any register" opcodes. Provide core methods > that > can be used by all manufacturers. SPI NOR controller ops are > intentionally > not supported as we intend to move all the SPI NOR controller drivers > under the SPI subsystem. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > Tested-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> > Reviewed-by: Pratyush Yadav <p.yadav@ti.com> > --- > drivers/mtd/spi-nor/core.c | 41 ++++++++++++++++++++++++++++++++++++++ > drivers/mtd/spi-nor/core.h | 4 ++++ > 2 files changed, 45 insertions(+) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index 281e3d25f74c..f1aa1e2ea7c9 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -307,6 +307,47 @@ ssize_t spi_nor_write_data(struct spi_nor *nor, > loff_t to, size_t len, > return nor->controller_ops->write(nor, to, len, buf); > } > > +/** > + * spi_nor_read_reg() - read register to flash memory > + * @nor: pointer to 'struct spi_nor'. > + * @op: SPI memory operation. op->data.buf must be DMA-able. > + * @proto: SPI protocol to use for the register operation. > + * > + * Return: zero on success, -errno otherwise > + */ > +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto) > +{ > + if (!nor->spimem) > + return -EOPNOTSUPP; > + > + spi_nor_spimem_setup_op(nor, op, proto); > + return spi_nor_spimem_exec_op(nor, op); > +} > + > +/** > + * spi_nor_write_reg() - write register to flash memory > + * @nor: pointer to 'struct spi_nor' > + * @op: SPI memory operation. op->data.buf must be DMA-able. > + * @proto: SPI protocol to use for the register operation. > + * > + * Return: zero on success, -errno otherwise > + */ > +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto) > +{ > + int ret; > + > + if (!nor->spimem) > + return -EOPNOTSUPP; > + > + ret = spi_nor_write_enable(nor); > + if (ret) > + return ret; > + spi_nor_spimem_setup_op(nor, op, proto); > + return spi_nor_spimem_exec_op(nor, op); > +} > + > /** > * spi_nor_write_enable() - Set write enable latch with Write Enable > command. > * @nor: pointer to 'struct spi_nor'. > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index f952061d5c24..7c704475946d 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -554,6 +554,10 @@ ssize_t spi_nor_read_data(struct spi_nor *nor, > loff_t from, size_t len, > u8 *buf); > ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, > const u8 *buf); > +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto); > +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto);
These look rather odd. I'd expect to see an address and such for such a "random register read/write". Looks like these functions don't do much except calling spi_nor_spimem_setup_op() and exec_op() and don't have anything to do with register access (except maybe for the write enable). Can't we have a bit more sophisticated interface in the core? Something that calls into the flash driver to assemble the spi_mem_op automatically? Assuming that this will be used more often to access registers in a flash.
-michael
> int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); > > int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t > len, u8 *buf);
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