Messages in this thread | | | Date | Mon, 21 Mar 2022 17:30:18 -0500 | From | Rob Herring <> | Subject | Re: [PATCH v14 4/6] dt-bindings: soc: mediatek: add gce-client-reg for MUTEX |
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On Thu, Mar 17, 2022 at 10:39:24PM +0800, Moudy Ho wrote: > In order to allow modules with latency requirements such as MDP3 > to set registers through CMDQ, add the relevant GCE property. > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: CK Hu <ck.hu@mediatek.com> > --- > .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml > index f825af49f820..a4892979480c 100644 > --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml > +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml > @@ -60,6 +60,14 @@ properties: > include/dt-bindings/gce/<chip>-gce.h of each chips. > $ref: /schemas/types.yaml#/definitions/phandle-array > > + mediatek,gce-client-reg: > + description: The register of client driver can be configured by gce with > + 4 arguments defined in this property, such as phandle of gce, subsys id, > + register offset and size. Each GCE subsys id is mapping to a client > + defined in the header include/dt-bindings/gce/<chip>-gce.h. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + maxItems: 1
items: items: - description: phandle of GCE - description: GCE subsys id - description: register offset - description: register size
> + > required: > - compatible > - reg > -- > 2.18.0 > >
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