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    SubjectRe: [net-next PATCH v2] net: dsa: qca8k: pack driver struct and improve cache use
    On Mon, Mar 21, 2022 at 07:06:07PM +0100, Ansuel Smith wrote:
    > > If you provide your own ds->slave_mii_bus there should be no reason to
    > > need a ds->ops->phy_read, since your slave_mii_bus already has one.
    > >
    > > Bottom line, phy_read is just there in case they it is helpful.
    > > Whereas ds->slave_mii_bus is there if you want to have a non-OF based
    > > phy_connect, with the implicit assumption that the phy_addr is equal to
    > > the port, and it can't be in any other way.
    > >
    > > So if ds->ops->phy_read / ds->ops->phy_write aren't useful, don't use them.
    > > I suppose one of the drivers you saw with "custom mdiobus" was sja1105.
    > > I have no interest whatsoever in converting that driver to use
    > > ds->slave_mii_bus or ds->phy_read.
    >
    > My idea was to provide some type of API where the switch insert some
    > type of data and DSA decide to declare a dsa mdiobus or a
    > dedicated one based on the config provided. Think I will have to provide
    > an RFC to better describe this idea. The idea would be to drop phy_read
    > and phy_write and replace them with a single op that provide a
    > configuration.

    Just register a non-OF based MDIO bus for the legacy_phy_port_mapping = true
    case using plain mdiobus_register() and provide it to ds->slave_mii_bus,
    and delete the ds->ops->phy_read and ds->ops->phy_write, instead
    adapting qca8k_phy_read and qca8k_phy_write to be your bus->read and
    bus->write. Problem solved. No need to touch the existing logic and
    implicitly the other drivers that use it.

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