Messages in this thread | | | Date | Fri, 18 Mar 2022 10:29:32 +0100 | From | Krzysztof Kozlowski <> | Subject | Re: [PATCH 4/5 v2] dt-bindings: gnss: Add two more chips |
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On 17/03/2022 23:58, Linus Walleij wrote: > The CSR GSD4t is a CSR product using the SiRFstarIV core, and > the CSR CSRG05TA03-ICJE-R is a CSR product using the SiRFstarV > core. > > These chips have a SRESETN line that can be pulled low to hard > reset the chip and in some designs this is connected to a GPIO, > so add this as an optional property. > > Update the example with a reset line so users see that it need > to be tagged as active low. > > Cc: devicetree@vger.kernel.org > Cc: Krzysztof Kozlowski <krzk@kernel.org> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > ChangeLog v1->v2: > - Add maxItems: 1 to the reset-gpios > --- > Documentation/devicetree/bindings/gnss/sirfstar.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) >
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards, Krzysztof
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