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Subject[PATCH v1] ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1
Date
Since mac0/1 and mac2/3 are physically located on different die,
they have different properties by nature, which is mac0/1 has smaller delay step.

The property 'phy-mode' on ast2600 mac0 and mac1 is recommended to set to 'rgmii-rxid'
which enables the RX interface delay from the PHY chip.
Refer page 45 of SDK User Guide v08.00
https://github.com/AspeedTech-BMC/openbmc/releases/download/v08.00/SDK_User_Guide_v08.00.pdf

Set mac delay according to the mactest result.

Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com>
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index b7eb552640cb..db16ba307e97 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -103,7 +103,7 @@ ethphy3: ethernet-phy@0 {
&mac0 {
status = "okay";

- phy-mode = "rgmii";
+ phy-mode = "rgmii-rxid";
phy-handle = <&ethphy0>;

pinctrl-names = "default";
@@ -114,7 +114,7 @@ &mac0 {
&mac1 {
status = "okay";

- phy-mode = "rgmii";
+ phy-mode = "rgmii-rxid";
phy-handle = <&ethphy1>;

pinctrl-names = "default";
@@ -141,6 +141,21 @@ &mac3 {
pinctrl-0 = <&pinctrl_rgmii4_default>;
};

+&syscon {
+ mac0-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+ mac1-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+ mac2-clk-delay = <0x08 0x04
+ 0x08 0x04
+ 0x08 0x04>;
+ mac3-clk-delay = <0x08 0x04
+ 0x08 0x04
+ 0x08 0x04>;
+};
+
&emmc_controller {
status = "okay";
};
--
2.25.1
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