Messages in this thread Patch in this message | | | From | Wander Lairson Costa <> | Subject | [PATCH v4 2/5] serial/8250: Use the cache value of the FCR register | Date | Wed, 16 Mar 2022 11:36:41 -0300 |
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commit 5021d709b31b ("tty: serial: Use fifo in 8250 console driver") erroneous tries to read the FCR register content, but this register is write-only.
This patch fixes that by reading the content from the port struct fcr field.
Thanks to Jon Hunter and Jiri Slaby.
Suggested-by: Jiri Slaby <jirislaby@kernel.org> Reported-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wander Lairson Costa <wander@redhat.com> --- drivers/tty/serial/8250/8250_port.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 2abb3de11a48..9f3fa9fe2a4e 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -3410,7 +3410,7 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, use_fifo = (up->capabilities & UART_CAP_FIFO) && port->fifosize > 1 && - (serial_port_in(port, UART_FCR) & UART_FCR_ENABLE_FIFO) && + (up->fcr & UART_FCR_ENABLE_FIFO) && /* * After we put a data in the fifo, the controller will send * it regardless of the CTS state. Therefore, only use fifo -- 2.35.1
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