Messages in this thread Patch in this message | | | From | Michael Walle <> | Subject | [PATCH RFC v1 1/2] dt-bindings: pinctrl: ocelot: add reset property | Date | Sun, 13 Mar 2022 16:46:39 +0100 |
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On the LAN966x SoC the GPIO controller will be resetted together with the SGPIO and the switch core. Add a phandle to register the shared reset line.
Signed-off-by: Michael Walle <michael@walle.cc> --- .../devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml index 40148aef4ecf..cc9e14a214b1 100644 --- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml @@ -42,6 +42,14 @@ properties: "#interrupt-cells": const: 2 + resets: + maxItems: 1 + + reset-names: + description: Optional shared switch reset. + items: + - const: switch + required: - compatible - reg -- 2.30.2
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