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    Subject[PATCH AUTOSEL 5.16 49/52] arm64: errata: Add detection for TRBE trace data corruption
    Date
    From: Anshuman Khandual <anshuman.khandual@arm.com>

    [ Upstream commit 708e8af4924ec2fdd5b81fe09192c6bac2f86935 ]

    TRBE implementations affected by Arm erratum #1902691 might corrupt trace
    data or deadlock, when it's being written into the memory. So effectively
    TRBE is broken and hence cannot be used to capture trace data. This adds
    a new errata ARM64_ERRATUM_1902691 in arm64 errata framework.

    Cc: Catalin Marinas <catalin.marinas@arm.com>
    Cc: Will Deacon <will@kernel.org>
    Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
    Cc: Suzuki Poulose <suzuki.poulose@arm.com>
    Cc: coresight@lists.linaro.org
    Cc: linux-doc@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-kernel@vger.kernel.org
    Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
    Acked-by: Catalin Marinas <catalin.marinas@arm.com>
    Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
    Link: https://lore.kernel.org/r/1643120437-14352-5-git-send-email-anshuman.khandual@arm.com
    Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    Documentation/arm64/silicon-errata.rst | 2 ++
    arch/arm64/Kconfig | 18 ++++++++++++++++++
    arch/arm64/kernel/cpu_errata.c | 9 +++++++++
    arch/arm64/tools/cpucaps | 1 +
    4 files changed, 30 insertions(+)

    diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst
    index d5c6befc44eb8..1b0e53ececda9 100644
    --- a/Documentation/arm64/silicon-errata.rst
    +++ b/Documentation/arm64/silicon-errata.rst
    @@ -56,6 +56,8 @@ stable kernels.
    +----------------+-----------------+-----------------+-----------------------------+
    | ARM | Cortex-A510 | #2038923 | ARM64_ERRATUM_2038923 |
    +----------------+-----------------+-----------------+-----------------------------+
    +| ARM | Cortex-A510 | #1902691 | ARM64_ERRATUM_1902691 |
    ++----------------+-----------------+-----------------+-----------------------------+
    | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
    +----------------+-----------------+-----------------+-----------------------------+
    | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
    diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
    index 2b75e8a9bf88c..7d710589e1818 100644
    --- a/arch/arm64/Kconfig
    +++ b/arch/arm64/Kconfig
    @@ -819,6 +819,24 @@ config ARM64_ERRATUM_2038923

    If unsure, say Y.

    +config ARM64_ERRATUM_1902691
    + bool "Cortex-A510: 1902691: workaround TRBE trace corruption"
    + depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
    + default y
    + help
    + This option adds the workaround for ARM Cortex-A510 erratum 1902691.
    +
    + Affected Cortex-A510 core might cause trace data corruption, when being written
    + into the memory. Effectively TRBE is broken and hence cannot be used to capture
    + trace data.
    +
    + Work around this problem in the driver by just preventing TRBE initialization on
    + affected cpus. The firmware must have disabled the access to TRBE for the kernel
    + on such implementations. This will cover the kernel for any firmware that doesn't
    + do this already.
    +
    + If unsure, say Y.
    +
    config CAVIUM_ERRATUM_22375
    bool "Cavium erratum 22375, 24313"
    default y
    diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
    index a64bf132c6336..066098198c248 100644
    --- a/arch/arm64/kernel/cpu_errata.c
    +++ b/arch/arm64/kernel/cpu_errata.c
    @@ -617,6 +617,15 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
    /* Cortex-A510 r0p0 - r0p2 */
    ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2)
    },
    +#endif
    +#ifdef CONFIG_ARM64_ERRATUM_1902691
    + {
    + .desc = "ARM erratum 1902691",
    + .capability = ARM64_WORKAROUND_1902691,
    +
    + /* Cortex-A510 r0p0 - r0p1 */
    + ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 1)
    + },
    #endif
    {
    }
    diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
    index 45a06d36d0807..e7719e8f18def 100644
    --- a/arch/arm64/tools/cpucaps
    +++ b/arch/arm64/tools/cpucaps
    @@ -57,6 +57,7 @@ WORKAROUND_1508412
    WORKAROUND_1542419
    WORKAROUND_2064142
    WORKAROUND_2038923
    +WORKAROUND_1902691
    WORKAROUND_TRBE_OVERWRITE_FILL_MODE
    WORKAROUND_TSB_FLUSH_FAILURE
    WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
    --
    2.34.1
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