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SubjectRe: [PATCHv4 29/30] ACPICA: Avoid cache flush on TDX guest
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On 2/28/22 08:37, Kirill A. Shutemov wrote:
>> Agree, why is this marked as "TODO"? The cache flushes associated with
>> ACPI sleep states are to flush cache before bare metal power loss to
>> CPU caches and bare metal transition of DDR in self-refresh mode. If a
>> cache flush is required it is the responsibility of the hypervisor.
>> Either it is safe for all guests or it is unsafe for all guests, not
>> TD specific.
> Do we have "any VM" check? I can't find it right away.

Yes:

> #define X86_FEATURE_HYPERVISOR ( 4*32+31) /* Running on a hypervisor */

I'm pretty sure an earlier version of this patch used it.

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