lkml.org 
[lkml]   [2022]   [Feb]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v3 3/8] riscv: Remove unneeded definitions from asm/ftrace.h
Date
The macros for generating the auipc + jalr instruction pair is only ever
used in kernel/ftrace.c, so move the definitions there.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
---
arch/riscv/include/asm/ftrace.h | 35 +--------------------------------
arch/riscv/kernel/ftrace.c | 35 +++++++++++++++++++++++++++++++++
2 files changed, 36 insertions(+), 34 deletions(-)

diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h
index 04dad3380041..585714993749 100644
--- a/arch/riscv/include/asm/ftrace.h
+++ b/arch/riscv/include/asm/ftrace.h
@@ -36,41 +36,8 @@ struct dyn_arch_ftrace {
#endif

#ifdef CONFIG_DYNAMIC_FTRACE
-/*
- * A general call in RISC-V is a pair of insts:
- * 1) auipc: setting high-20 pc-related bits to ra register
- * 2) jalr: setting low-12 offset to ra, jump to ra, and set ra to
- * return address (original pc + 4)
- *
- * Dynamic ftrace generates probes to call sites, so we must deal with
- * both auipc and jalr at the same time.
- */
-
-#define MCOUNT_ADDR ((unsigned long)MCOUNT_NAME)
-#define JALR_SIGN_MASK (0x00000800)
-#define JALR_OFFSET_MASK (0x00000fff)
-#define AUIPC_OFFSET_MASK (0xfffff000)
-#define AUIPC_PAD (0x00001000)
-#define JALR_SHIFT 20
-#define JALR_BASIC (0x000080e7)
-#define AUIPC_BASIC (0x00000097)
-#define NOP4 (0x00000013)
-
-#define make_call(caller, callee, call) \
-do { \
- call[0] = to_auipc_insn((unsigned int)((unsigned long)callee - \
- (unsigned long)caller)); \
- call[1] = to_jalr_insn((unsigned int)((unsigned long)callee - \
- (unsigned long)caller)); \
-} while (0)
-
-#define to_jalr_insn(offset) \
- (((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_BASIC)

-#define to_auipc_insn(offset) \
- ((offset & JALR_SIGN_MASK) ? \
- (((offset & AUIPC_OFFSET_MASK) + AUIPC_PAD) | AUIPC_BASIC) : \
- ((offset & AUIPC_OFFSET_MASK) | AUIPC_BASIC))
+#define MCOUNT_ADDR ((unsigned long)MCOUNT_NAME)

/*
* Let auipc+jalr be the basic *mcount unit*, so we make it 8 bytes here.
diff --git a/arch/riscv/kernel/ftrace.c b/arch/riscv/kernel/ftrace.c
index 4716f4cdc038..2cc15dc45ce0 100644
--- a/arch/riscv/kernel/ftrace.c
+++ b/arch/riscv/kernel/ftrace.c
@@ -12,6 +12,41 @@
#include <asm/patch.h>

#ifdef CONFIG_DYNAMIC_FTRACE
+/*
+ * A general call in RISC-V is a pair of insts:
+ * 1) auipc: setting high-20 pc-related bits to ra register
+ * 2) jalr: setting low-12 offset to ra, jump to ra, and set ra to
+ * return address (original pc + 4)
+ *
+ * Dynamic ftrace generates probes to call sites, so we must deal with
+ * both auipc and jalr at the same time.
+ */
+
+#define JALR_SIGN_MASK (0x00000800)
+#define JALR_OFFSET_MASK (0x00000fff)
+#define AUIPC_OFFSET_MASK (0xfffff000)
+#define AUIPC_PAD (0x00001000)
+#define JALR_SHIFT 20
+#define JALR_BASIC (0x000080e7)
+#define AUIPC_BASIC (0x00000097)
+#define NOP4 (0x00000013)
+
+#define make_call(caller, callee, call) \
+do { \
+ call[0] = to_auipc_insn((unsigned int)((unsigned long)callee - \
+ (unsigned long)caller)); \
+ call[1] = to_jalr_insn((unsigned int)((unsigned long)callee - \
+ (unsigned long)caller)); \
+} while (0)
+
+#define to_jalr_insn(offset) \
+ (((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_BASIC)
+
+#define to_auipc_insn(offset) \
+ ((offset & JALR_SIGN_MASK) ? \
+ (((offset & AUIPC_OFFSET_MASK) + AUIPC_PAD) | AUIPC_BASIC) : \
+ ((offset & AUIPC_OFFSET_MASK) | AUIPC_BASIC))
+
int ftrace_arch_code_modify_prepare(void) __acquires(&text_mutex)
{
mutex_lock(&text_mutex);
--
2.35.1
\
 
 \ /
  Last update: 2022-02-24 16:26    [W:0.641 / U:0.168 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site