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SubjectRe: [3/3] drm/mediatek: keep dsi as LP00 before dcs cmds transfer
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Hi, Xinlei:

On Fri, 2022-02-11 at 22:30 +0800, xinlei.lee@mediatek.com wrote:
> From: Jitao Shi <jitao.shi@mediatek.com>
>
> To comply with the panel sequence, hold the mipi signal to LP00
> before the dcs cmds transmission,
> and pull the mipi signal high from LP00 to LP11 until the start of
> the dcs cmds transmission.
> If dsi is not in cmd mode, then dsi will pull the mipi signal high in
> the mtk_output_dsi_enable function.
>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 32 +++++++++++++++++++++++++---
> ----
> 1 file changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index e47c338..17a5270 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -203,6 +203,7 @@ struct mtk_dsi {
> struct mtk_phy_timing phy_timing;
> int refcount;
> bool enabled;
> + bool lanes_ready;
> u32 irq_data;
> wait_queue_head_t irq_wait_queue;
> const struct mtk_dsi_driver_data *driver_data;
> @@ -654,13 +655,6 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
> mtk_dsi_config_vdo_timing(dsi);
> mtk_dsi_set_interrupt_enable(dsi);
>
> - mtk_dsi_rxtx_control(dsi);
> - usleep_range(30, 100);
> - mtk_dsi_reset_dphy(dsi);
> - mtk_dsi_clk_ulp_mode_leave(dsi);
> - mtk_dsi_lane0_ulp_mode_leave(dsi);
> - mtk_dsi_clk_hs_mode(dsi, 0);
> -
> return 0;
> err_disable_engine_clk:
> clk_disable_unprepare(dsi->engine_clk);
> @@ -682,6 +676,8 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi)
> mtk_dsi_reset_engine(dsi);
> mtk_dsi_lane0_ulp_mode_enter(dsi);
> mtk_dsi_clk_ulp_mode_enter(dsi);
> + /* set the lane number as 0 */
> + writel(0, dsi->regs + DSI_TXRX_CTRL);

If this is not related to 'sequence', separate this to another patch.

Regards,
CK

>
> mtk_dsi_disable(dsi);
>
> @@ -689,6 +685,8 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi)
> clk_disable_unprepare(dsi->digital_clk);
>
> phy_power_off(dsi->phy);
> +
> + dsi->lanes_ready = false;
> }
>
> static void mtk_output_dsi_enable(struct mtk_dsi *dsi)
> @@ -696,6 +694,16 @@ static void mtk_output_dsi_enable(struct mtk_dsi
> *dsi)
> if (dsi->enabled)
> return;
>
> + if (!dsi->lanes_ready) {
> + dsi->lanes_ready = true;
> + mtk_dsi_rxtx_control(dsi);
> + usleep_range(30, 100);
> + mtk_dsi_reset_dphy(dsi);
> + mtk_dsi_clk_ulp_mode_leave(dsi);
> + mtk_dsi_lane0_ulp_mode_leave(dsi);
> + mtk_dsi_clk_hs_mode(dsi, 0);
> + }
> +
> mtk_dsi_set_mode(dsi);
> mtk_dsi_clk_hs_mode(dsi, 1);
>
> @@ -907,6 +915,16 @@ static ssize_t mtk_dsi_host_transfer(struct
> mipi_dsi_host *host,
> if (MTK_DSI_HOST_IS_READ(msg->type))
> irq_flag |= LPRX_RD_RDY_INT_FLAG;
>
> + if (!dsi->lanes_ready) {
> + dsi->lanes_ready = true;
> + mtk_dsi_rxtx_control(dsi);
> + usleep_range(30, 100);
> + mtk_dsi_reset_dphy(dsi);
> + mtk_dsi_clk_ulp_mode_leave(dsi);
> + mtk_dsi_lane0_ulp_mode_leave(dsi);
> + mtk_dsi_clk_hs_mode(dsi, 0);
> + msleep(20);
> + }
> if (mtk_dsi_host_send_cmd(dsi, msg, irq_flag) < 0)
> return -ETIME;
>

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