lkml.org 
[lkml]   [2022]   [Feb]   [23]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH 1/3] soundwire: qcom: add runtime pm support
From


On 22/02/2022 19:15, Pierre-Louis Bossart wrote:
>
>
> On 2/21/22 04:41, Srinivas Kandagatla wrote:
>> Add support to runtime PM using SoundWire clock stop on supported instances
>> and bus reset on instances that require full reset.
>
> This commit message and code are a bit confusing, e.g. you have a
> boolean state
>
> ctrl->clk_stop_bus_reset = true;
>
> Does this mean bus reset on exiting clock stop? or just that clock stop
> is not supported and bus reset is required with complete re-enumeration.

WSA instances of SoundWire controllers do not support clk stop and a
reset of ip is required with complete re-enumeration when a clock is cut
off during suspend.

>
> It would be good to try and explain using SoundWire 1.x terminology what
> actions are taken on resume.
>
There are two cases here.

1> Controller Instance support ClockStop Mode0, we mostly use the
generic core to do that except in resume path we make sure that we start
the clock.

2> Controller Instances which that do not support ClockStop, we do soft
reset of controller along with hard resetting slaves.

>
>> @@ -1267,6 +1305,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
>> ctrl->bus.ops = &qcom_swrm_ops;
>> ctrl->bus.port_ops = &qcom_swrm_port_ops;
>> ctrl->bus.compute_params = &qcom_swrm_compute_params;
>> + ctrl->bus.clk_stop_timeout = 300;
>>
>> ret = qcom_swrm_get_port_config(ctrl);
>> if (ret)
>> @@ -1319,6 +1358,21 @@ static int qcom_swrm_probe(struct platform_device *pdev)
>> (ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
>> ctrl->version & 0xffff);
>>
>> + pm_runtime_set_autosuspend_delay(dev, 3000);
>> + pm_runtime_use_autosuspend(dev);
>> + pm_runtime_mark_last_busy(dev);
>> + pm_runtime_set_active(dev);
>> + pm_runtime_enable(dev);
>> +
>> + /* Clk stop is not supported on WSA Soundwire masters */
>> + if (ctrl->version <= 0x01030000) {
>> + ctrl->clk_stop_bus_reset = true;
>> + } else {
>> + ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val);
>> + if (val == MASTER_ID_WSA)
>> + ctrl->clk_stop_bus_reset = true;
>> + }
>
> I think this means clock_stop_not_supported?

Yes It makes more sense to reword this to clock_stop_not_supported.


>
>> +static int swrm_runtime_resume(struct device *dev)
>> +{
>> + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
>> + int ret;
>> +
>> + clk_prepare_enable(ctrl->hclk);
>> +
>> + if (ctrl->clk_stop_bus_reset) {
>> + reinit_completion(&ctrl->enumeration);
>> + ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01);
>> + qcom_swrm_get_device_status(ctrl);
>
> don't you need some sort of delay before checking the controller and
> device status? The bus reset sequence takes 4096 bits, that's a non-zero
> time.

This is soft reset not full Bus Reset as WSA slaves have hard reset pins
that will be toggled as part of suspend-resume.


>
>> + sdw_handle_slave_status(&ctrl->bus, ctrl->status);
>> + qcom_swrm_init(ctrl);
>> + wait_for_completion_timeout(&ctrl->enumeration,
>> + msecs_to_jiffies(TIMEOUT_MS));
>> + } else {
>> + ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR,
>> + SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET);
>> +
>> + ctrl->intr_mask |= SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
>> +
>> + usleep_range(100, 105);
>> + }
>> +
>> + if (!swrm_wait_for_frame_gen_enabled(ctrl))
>> + dev_err(ctrl->dev, "link failed to connect\n");
>> +
>> + usleep_range(300, 305);
>> + ret = sdw_bus_exit_clk_stop(&ctrl->bus);
>> + if (ret < 0)
>> + dev_err(ctrl->dev, "bus failed to exit clock stop %d\n", ret);
>> +
>> + return 0;
>> +}
>> +
>> +static int __maybe_unused swrm_runtime_suspend(struct device *dev)
>> +{
>> + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
>> + int ret;
>> +
>> + if (!ctrl->clk_stop_bus_reset) {
>> + /* Mask bus clash interrupt */
>> + ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
>> + }
>> + /* Prepare slaves for clock stop */
>> + ret = sdw_bus_prep_clk_stop(&ctrl->bus);
>> + if (ret < 0) {
>
> if a device has lost sync and reports -ENODATA, you want still want to
> go ahead and not prevent the suspend operation from happening.

okay.


--srini
>
>> + dev_err(dev, "prepare clock stop failed %d", ret);
>> + return ret;
>> + }
>> +
>> + ret = sdw_bus_clk_stop(&ctrl->bus);
>> + if (ret < 0 && ret != -ENODATA) {
>> + dev_err(dev, "bus clock stop failed %d", ret);
>> + return ret;
>> + }
>> +
>> + clk_disable_unprepare(ctrl->hclk);
>> +
>> + usleep_range(300, 305);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct dev_pm_ops swrm_dev_pm_ops = {
>> + SET_RUNTIME_PM_OPS(swrm_runtime_suspend, swrm_runtime_resume, NULL)
>> +};
>> +
>> static const struct of_device_id qcom_swrm_of_match[] = {
>> { .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data },
>> { .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data },
>> @@ -1359,6 +1506,7 @@ static struct platform_driver qcom_swrm_driver = {
>> .driver = {
>> .name = "qcom-soundwire",
>> .of_match_table = qcom_swrm_of_match,
>> + .pm = &swrm_dev_pm_ops,
>> }
>> };
>> module_platform_driver(qcom_swrm_driver);

\
 
 \ /
  Last update: 2022-02-23 17:37    [W:0.064 / U:0.832 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site