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SubjectRe: [PATCH v5 7/8] hisi_acc_vfio_pci: Add support for VFIO live migration
On Tue, 22 Feb 2022 20:52:51 -0400
Jason Gunthorpe <jgg@nvidia.com> wrote:

> On Mon, Feb 21, 2022 at 11:40:42AM +0000, Shameer Kolothum wrote:
>
> > + /*
> > + * ACC VF dev BAR2 region consists of both functional register space
> > + * and migration control register space. For migration to work, we
> > + * need access to both. Hence, we map the entire BAR2 region here.
> > + * But from a security point of view, we restrict access to the
> > + * migration control space from Guest(Please see mmap/ioctl/read/write
> > + * override functions).
> > + *
> > + * Also the HiSilicon ACC VF devices supported by this driver on
> > + * HiSilicon hardware platforms are integrated end point devices
> > + * and has no capability to perform PCIe P2P.
>
> If that is the case why not implement the RUNNING_P2P as well as a
> NOP?
>
> Alex expressed concerned about proliferation of non-P2P devices as it
> complicates qemu to support mixes

I read the above as more of a statement about isolation, ie. grouping.
Given that all DMA from the device is translated by the IOMMU, how is
it possible that a device can entirely lack p2p support, or even know
that the target address post-translation is to a peer device rather
than system memory. If this is the case, it sounds like a restriction
of the SMMU not supporting translations that reflect back to the I/O
bus rather than a feature of the device itself. Thanks,

Alex

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