Messages in this thread | | | From | Kai-Heng Feng <> | Date | Tue, 22 Feb 2022 14:09:42 +0800 | Subject | Re: [PATCH] misc: rtsx: rts522a rts5228 rts5261 support Runtime PM |
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On Mon, Feb 21, 2022 at 7:20 PM Ricky WU <ricky_wu@realtek.com> wrote: > > rts522a, rts5228, rts5261 > add extra init flow for rtd3 > add more power_down setting for avoid being woken up > by plugging or unplugging card when system in S3 > > Signed-off-by: Ricky Wu <ricky_wu@realtek.com>
This can fix an issue that rts522a cannot detect card under D3.
Tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
> --- > drivers/misc/cardreader/rts5227.c | 47 ++++++++++++++++++++++++++++++ > drivers/misc/cardreader/rts5228.c | 21 +++++++++++-- > drivers/misc/cardreader/rts5261.c | 33 +++++++++++++++++++-- > drivers/misc/cardreader/rtsx_pcr.h | 2 ++ > 4 files changed, 98 insertions(+), 5 deletions(-) > > diff --git a/drivers/misc/cardreader/rts5227.c b/drivers/misc/cardreader/rts5227.c > index 4bcfbc9afbac..d676cf63a966 100644 > --- a/drivers/misc/cardreader/rts5227.c > +++ b/drivers/misc/cardreader/rts5227.c > @@ -72,6 +72,8 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr) > > pci_read_config_dword(pdev, PCR_SETTING_REG2, ®); > pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); > + if (CHK_PCI_PID(pcr, 0x522A)) > + pcr->rtd3_en = rtsx_reg_to_rtd3(reg); > if (rtsx_check_mmc_support(reg)) > pcr->extra_caps |= EXTRA_CAPS_NO_MMC; > pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); > @@ -171,6 +173,28 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) > else > rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x00); > > + if (CHK_PCI_PID(pcr, 0x522A)) > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_AUTOLOAD_CFG1, > + CD_RESUME_EN_MASK, CD_RESUME_EN_MASK); > + > + if (pcr->rtd3_en) { > + if (CHK_PCI_PID(pcr, 0x522A)) { > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x01); > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x30); > + } else { > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x01); > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x33); > + } > + } else { > + if (CHK_PCI_PID(pcr, 0x522A)) { > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x00); > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x20); > + } else { > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x30); > + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x00); > + } > + } > + > if (option->force_clkreq_0) > rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, > FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW); > @@ -438,6 +462,28 @@ static int rts522a_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) > return rtsx_pci_send_cmd(pcr, 100); > } > > +static void rts522a_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime) > +{ > + /* Set relink_time to 0 */ > + rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); > + rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); > + rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, > + RELINK_TIME_MASK, 0); > + > + rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, > + D3_DELINK_MODE_EN, D3_DELINK_MODE_EN); > + > + if (!runtime) { > + rtsx_pci_write_register(pcr, RTS522A_AUTOLOAD_CFG1, > + CD_RESUME_EN_MASK, 0); > + rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, 0x01, 0x00); > + rtsx_pci_write_register(pcr, RTS522A_PME_FORCE_CTL, 0x30, 0x20); > + } > + > + rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN); > +} > + > + > static void rts522a_set_l1off_cfg_sub_d0(struct rtsx_pcr *pcr, int active) > { > struct rtsx_cr_option *option = &pcr->option; > @@ -473,6 +519,7 @@ static const struct pcr_ops rts522a_pcr_ops = { > .card_power_on = rts5227_card_power_on, > .card_power_off = rts5227_card_power_off, > .switch_output_voltage = rts522a_switch_output_voltage, > + .force_power_down = rts522a_force_power_down, > .cd_deglitch = NULL, > .conv_clk_and_div_n = NULL, > .set_l1off_cfg_sub_d0 = rts522a_set_l1off_cfg_sub_d0, > diff --git a/drivers/misc/cardreader/rts5228.c b/drivers/misc/cardreader/rts5228.c > index ffe3afbf8bfe..af581f4f74d1 100644 > --- a/drivers/misc/cardreader/rts5228.c > +++ b/drivers/misc/cardreader/rts5228.c > @@ -102,6 +102,14 @@ static void rts5228_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool run > rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, > D3_DELINK_MODE_EN, D3_DELINK_MODE_EN); > > + if (!runtime) { > + rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1, > + CD_RESUME_EN_MASK, 0); > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); > + rtsx_pci_write_register(pcr, RTS5228_REG_PME_FORCE_CTL, > + FORCE_PM_CONTROL | FORCE_PM_VALUE, FORCE_PM_CONTROL); > + } > + > rtsx_pci_write_register(pcr, FPDCTL, > SSC_POWER_DOWN, SSC_POWER_DOWN); > } > @@ -480,9 +488,18 @@ static int rts5228_extra_init_hw(struct rtsx_pcr *pcr) > FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH); > > rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB); > - rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00); > + > + if (pcr->rtd3_en) { > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x01); > rtsx_pci_write_register(pcr, RTS5228_REG_PME_FORCE_CTL, > - FORCE_PM_CONTROL | FORCE_PM_VALUE, FORCE_PM_CONTROL); > + FORCE_PM_CONTROL | FORCE_PM_VALUE, > + FORCE_PM_CONTROL | FORCE_PM_VALUE); > + } else { > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); > + rtsx_pci_write_register(pcr, RTS5228_REG_PME_FORCE_CTL, > + FORCE_PM_CONTROL | FORCE_PM_VALUE, FORCE_PM_CONTROL); > + } > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, D3_DELINK_MODE_EN, 0x00); > > return 0; > } > diff --git a/drivers/misc/cardreader/rts5261.c b/drivers/misc/cardreader/rts5261.c > index 64333347c14a..a77585ab0f30 100644 > --- a/drivers/misc/cardreader/rts5261.c > +++ b/drivers/misc/cardreader/rts5261.c > @@ -103,6 +103,24 @@ static void rts5261_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool run > rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, > D3_DELINK_MODE_EN, D3_DELINK_MODE_EN); > > + if (!runtime) { > + rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1, > + CD_RESUME_EN_MASK, 0); > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); > + rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, > + FORCE_PM_CONTROL | FORCE_PM_VALUE, FORCE_PM_CONTROL); > + > + } else { > + rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, > + FORCE_PM_CONTROL | FORCE_PM_VALUE, 0); > + > + rtsx_pci_write_register(pcr, RTS5261_FW_CTL, > + RTS5261_INFORM_RTD3_COLD, RTS5261_INFORM_RTD3_COLD); > + rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG4, > + RTS5261_FORCE_PRSNT_LOW, RTS5261_FORCE_PRSNT_LOW); > + > + } > + > rtsx_pci_write_register(pcr, RTS5261_REG_FPDCTL, > SSC_POWER_DOWN, SSC_POWER_DOWN); > } > @@ -536,9 +554,18 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr) > FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH); > > rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB); > - rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00); > - rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, > - FORCE_PM_CONTROL | FORCE_PM_VALUE, FORCE_PM_CONTROL); > + > + if (pcr->rtd3_en) { > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x01); > + rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, > + FORCE_PM_CONTROL | FORCE_PM_VALUE, > + FORCE_PM_CONTROL | FORCE_PM_VALUE); > + } else { > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); > + rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, > + FORCE_PM_CONTROL | FORCE_PM_VALUE, FORCE_PM_CONTROL); > + } > + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, D3_DELINK_MODE_EN, 0x00); > > /* Clear Enter RTD3_cold Information*/ > rtsx_pci_write_register(pcr, RTS5261_FW_CTL, > diff --git a/drivers/misc/cardreader/rtsx_pcr.h b/drivers/misc/cardreader/rtsx_pcr.h > index aa0ebd667227..37d1f316ae17 100644 > --- a/drivers/misc/cardreader/rtsx_pcr.h > +++ b/drivers/misc/cardreader/rtsx_pcr.h > @@ -15,6 +15,8 @@ > #define MIN_DIV_N_PCR 80 > #define MAX_DIV_N_PCR 208 > > +#define RTS522A_PME_FORCE_CTL 0xFF78 > +#define RTS522A_AUTOLOAD_CFG1 0xFF7C > #define RTS522A_PM_CTRL3 0xFF7E > > #define RTS524A_PME_FORCE_CTL 0xFF78 > -- > 2.25.1
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