Messages in this thread | | | Date | Tue, 22 Feb 2022 16:44:56 -0800 | Subject | Re: [PATCH v8 1/4] drm/msm/dpu: adjust display_v_end for eDP and DP | From | Kuogee Hsieh <> |
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On 2/18/2022 6:48 PM, Stephen Boyd wrote: > Quoting Kuogee Hsieh (2022-02-17 13:36:25) >> The “DP timing” requires the active region to be defined in the >> bottom-right corner of the frame dimensions which is different >> with DSI. Therefore both display_h_end and display_v_end need >> to be adjusted accordingly. However current implementation has >> only display_h_end adjusted. >> >> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> >> --- > Is this not a problem for me because this is set already to something > correct in the hardware?
There will have some pixels step into front porch area.
It should not cause any visual problem.
> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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