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Subject[PATCH 24/29] x86/text-patching: Make text_gen_insn() IBT aware
Make sure we don't generate direct JMP/CALL instructions to an ENDBR
instruction (which might be poison).

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/asm/text-patching.h | 6 ++++++
1 file changed, 6 insertions(+)

--- a/arch/x86/include/asm/text-patching.h
+++ b/arch/x86/include/asm/text-patching.h
@@ -5,6 +5,7 @@
#include <linux/types.h>
#include <linux/stddef.h>
#include <asm/ptrace.h>
+#include <asm/ibt.h>

struct paravirt_patch_site;
#ifdef CONFIG_PARAVIRT
@@ -101,6 +102,11 @@ void *text_gen_insn(u8 opcode, const voi
static union text_poke_insn insn; /* per instance */
int size = text_opcode_size(opcode);

+#ifdef CONFIG_X86_IBT
+ if (is_endbr(dest))
+ dest += 4;
+#endif
+
insn.opcode = opcode;

if (size > 1) {

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