Messages in this thread | | | Date | Wed, 28 Dec 2022 17:13:40 +0100 | From | Andrew Lunn <> | Subject | Re: [PATCH v6 2/2] arm64: dts: mt8195: Add Ethernet controller |
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> --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts > +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts > @@ -258,6 +258,66 @@ &mt6359_vsram_others_ldo_reg { > }; > > +ð { > + phy-mode ="rgmii-id"; > + phy-handle = <ðernet_phy0>; > + snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; > + snps,reset-delays-us = <0 10000 10000>; > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <ð_default_pins>; > + pinctrl-1 = <ð_sleep_pins>; > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>;
The mdio bus master is a property of the SoC, not the board. So i would expect it be in the .dtsi file.
> + ethernet_phy0: ethernet-phy@1 { > + compatible = "ethernet-phy-id001c.c916"; > + reg = <0x1>; > + };
Is the PHY integrated into the SoC, or on the board?
You also don't need the compatible, if the PHY correctly implements the ID registers.
Andrew
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